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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-26 12:25:09 +07:00
a4c3733d32
Many of the privileged CSRs exist in a supervisor and machine version that are used very similarly. Provide versions of the CSR names and fields that map to either the S-mode or M-mode variant depending on a new CONFIG_RISCV_M_MODE kconfig symbol. Contains contributions from Damien Le Moal <Damien.LeMoal@wdc.com> and Paul Walmsley <paul.walmsley@sifive.com>. Signed-off-by: Christoph Hellwig <hch@lst.de> Acked-by: Thomas Gleixner <tglx@linutronix.de> # for drivers/clocksource, drivers/irqchip [paul.walmsley@sifive.com: updated to apply] Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
107 lines
3.1 KiB
ArmAsm
107 lines
3.1 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2012 Regents of the University of California
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* Copyright (C) 2017 SiFive
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation, version 2.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/linkage.h>
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#include <asm/asm.h>
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#include <asm/csr.h>
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#include <asm/asm-offsets.h>
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ENTRY(__fstate_save)
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li a2, TASK_THREAD_F0
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add a0, a0, a2
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li t1, SR_FS
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csrs CSR_STATUS, t1
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frcsr t0
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fsd f0, TASK_THREAD_F0_F0(a0)
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fsd f1, TASK_THREAD_F1_F0(a0)
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fsd f2, TASK_THREAD_F2_F0(a0)
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fsd f3, TASK_THREAD_F3_F0(a0)
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fsd f4, TASK_THREAD_F4_F0(a0)
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fsd f5, TASK_THREAD_F5_F0(a0)
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fsd f6, TASK_THREAD_F6_F0(a0)
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fsd f7, TASK_THREAD_F7_F0(a0)
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fsd f8, TASK_THREAD_F8_F0(a0)
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fsd f9, TASK_THREAD_F9_F0(a0)
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fsd f10, TASK_THREAD_F10_F0(a0)
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fsd f11, TASK_THREAD_F11_F0(a0)
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fsd f12, TASK_THREAD_F12_F0(a0)
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fsd f13, TASK_THREAD_F13_F0(a0)
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fsd f14, TASK_THREAD_F14_F0(a0)
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fsd f15, TASK_THREAD_F15_F0(a0)
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fsd f16, TASK_THREAD_F16_F0(a0)
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fsd f17, TASK_THREAD_F17_F0(a0)
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fsd f18, TASK_THREAD_F18_F0(a0)
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fsd f19, TASK_THREAD_F19_F0(a0)
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fsd f20, TASK_THREAD_F20_F0(a0)
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fsd f21, TASK_THREAD_F21_F0(a0)
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fsd f22, TASK_THREAD_F22_F0(a0)
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fsd f23, TASK_THREAD_F23_F0(a0)
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fsd f24, TASK_THREAD_F24_F0(a0)
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fsd f25, TASK_THREAD_F25_F0(a0)
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fsd f26, TASK_THREAD_F26_F0(a0)
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fsd f27, TASK_THREAD_F27_F0(a0)
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fsd f28, TASK_THREAD_F28_F0(a0)
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fsd f29, TASK_THREAD_F29_F0(a0)
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fsd f30, TASK_THREAD_F30_F0(a0)
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fsd f31, TASK_THREAD_F31_F0(a0)
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sw t0, TASK_THREAD_FCSR_F0(a0)
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csrc CSR_STATUS, t1
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ret
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ENDPROC(__fstate_save)
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ENTRY(__fstate_restore)
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li a2, TASK_THREAD_F0
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add a0, a0, a2
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li t1, SR_FS
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lw t0, TASK_THREAD_FCSR_F0(a0)
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csrs CSR_STATUS, t1
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fld f0, TASK_THREAD_F0_F0(a0)
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fld f1, TASK_THREAD_F1_F0(a0)
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fld f2, TASK_THREAD_F2_F0(a0)
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fld f3, TASK_THREAD_F3_F0(a0)
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fld f4, TASK_THREAD_F4_F0(a0)
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fld f5, TASK_THREAD_F5_F0(a0)
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fld f6, TASK_THREAD_F6_F0(a0)
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fld f7, TASK_THREAD_F7_F0(a0)
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fld f8, TASK_THREAD_F8_F0(a0)
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fld f9, TASK_THREAD_F9_F0(a0)
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fld f10, TASK_THREAD_F10_F0(a0)
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fld f11, TASK_THREAD_F11_F0(a0)
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fld f12, TASK_THREAD_F12_F0(a0)
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fld f13, TASK_THREAD_F13_F0(a0)
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fld f14, TASK_THREAD_F14_F0(a0)
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fld f15, TASK_THREAD_F15_F0(a0)
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fld f16, TASK_THREAD_F16_F0(a0)
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fld f17, TASK_THREAD_F17_F0(a0)
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fld f18, TASK_THREAD_F18_F0(a0)
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fld f19, TASK_THREAD_F19_F0(a0)
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fld f20, TASK_THREAD_F20_F0(a0)
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fld f21, TASK_THREAD_F21_F0(a0)
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fld f22, TASK_THREAD_F22_F0(a0)
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fld f23, TASK_THREAD_F23_F0(a0)
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fld f24, TASK_THREAD_F24_F0(a0)
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fld f25, TASK_THREAD_F25_F0(a0)
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fld f26, TASK_THREAD_F26_F0(a0)
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fld f27, TASK_THREAD_F27_F0(a0)
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fld f28, TASK_THREAD_F28_F0(a0)
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fld f29, TASK_THREAD_F29_F0(a0)
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fld f30, TASK_THREAD_F30_F0(a0)
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fld f31, TASK_THREAD_F31_F0(a0)
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fscsr t0
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csrc CSR_STATUS, t1
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ret
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ENDPROC(__fstate_restore)
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