mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-30 14:06:51 +07:00
1da177e4c3
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
216 lines
4.1 KiB
C
216 lines
4.1 KiB
C
#ifndef __ASM_SPINLOCK_H
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#define __ASM_SPINLOCK_H
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#include <asm/system.h>
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/*
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* Simple spin lock operations.
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*/
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typedef struct {
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volatile unsigned long lock;
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#ifdef CONFIG_DEBUG_SPINLOCK
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volatile unsigned long owner_pc;
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volatile unsigned long owner_cpu;
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#endif
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#ifdef CONFIG_PREEMPT
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unsigned int break_lock;
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#endif
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} spinlock_t;
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#ifdef __KERNEL__
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#ifdef CONFIG_DEBUG_SPINLOCK
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#define SPINLOCK_DEBUG_INIT , 0, 0
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#else
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#define SPINLOCK_DEBUG_INIT /* */
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#endif
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#define SPIN_LOCK_UNLOCKED (spinlock_t) { 0 SPINLOCK_DEBUG_INIT }
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#define spin_lock_init(x) do { *(x) = SPIN_LOCK_UNLOCKED; } while(0)
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#define spin_is_locked(x) ((x)->lock != 0)
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#define spin_unlock_wait(x) do { barrier(); } while(spin_is_locked(x))
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#define _raw_spin_lock_flags(lock, flags) _raw_spin_lock(lock)
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#ifndef CONFIG_DEBUG_SPINLOCK
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static inline void _raw_spin_lock(spinlock_t *lock)
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{
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unsigned long tmp;
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__asm__ __volatile__(
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"b 1f # spin_lock\n\
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2: lwzx %0,0,%1\n\
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cmpwi 0,%0,0\n\
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bne+ 2b\n\
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1: lwarx %0,0,%1\n\
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cmpwi 0,%0,0\n\
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bne- 2b\n"
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PPC405_ERR77(0,%1)
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" stwcx. %2,0,%1\n\
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bne- 2b\n\
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isync"
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: "=&r"(tmp)
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: "r"(&lock->lock), "r"(1)
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: "cr0", "memory");
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}
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static inline void _raw_spin_unlock(spinlock_t *lock)
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{
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__asm__ __volatile__("eieio # spin_unlock": : :"memory");
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lock->lock = 0;
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}
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#define _raw_spin_trylock(l) (!test_and_set_bit(0,&(l)->lock))
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#else
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extern void _raw_spin_lock(spinlock_t *lock);
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extern void _raw_spin_unlock(spinlock_t *lock);
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extern int _raw_spin_trylock(spinlock_t *lock);
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#endif
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/*
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* Read-write spinlocks, allowing multiple readers
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* but only one writer.
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*
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* NOTE! it is quite common to have readers in interrupts
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* but no interrupt writers. For those circumstances we
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* can "mix" irq-safe locks - any writer needs to get a
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* irq-safe write-lock, but readers can get non-irqsafe
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* read-locks.
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*/
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typedef struct {
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volatile signed int lock;
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#ifdef CONFIG_PREEMPT
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unsigned int break_lock;
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#endif
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} rwlock_t;
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#define RW_LOCK_UNLOCKED (rwlock_t) { 0 }
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#define rwlock_init(lp) do { *(lp) = RW_LOCK_UNLOCKED; } while(0)
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#define read_can_lock(rw) ((rw)->lock >= 0)
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#define write_can_lock(rw) (!(rw)->lock)
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#ifndef CONFIG_DEBUG_SPINLOCK
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static __inline__ int _raw_read_trylock(rwlock_t *rw)
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{
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signed int tmp;
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__asm__ __volatile__(
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"2: lwarx %0,0,%1 # read_trylock\n\
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addic. %0,%0,1\n\
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ble- 1f\n"
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PPC405_ERR77(0,%1)
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" stwcx. %0,0,%1\n\
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bne- 2b\n\
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isync\n\
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1:"
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: "=&r"(tmp)
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: "r"(&rw->lock)
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: "cr0", "memory");
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return tmp > 0;
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}
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static __inline__ void _raw_read_lock(rwlock_t *rw)
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{
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signed int tmp;
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__asm__ __volatile__(
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"b 2f # read_lock\n\
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1: lwzx %0,0,%1\n\
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cmpwi 0,%0,0\n\
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blt+ 1b\n\
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2: lwarx %0,0,%1\n\
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addic. %0,%0,1\n\
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ble- 1b\n"
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PPC405_ERR77(0,%1)
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" stwcx. %0,0,%1\n\
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bne- 2b\n\
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isync"
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: "=&r"(tmp)
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: "r"(&rw->lock)
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: "cr0", "memory");
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}
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static __inline__ void _raw_read_unlock(rwlock_t *rw)
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{
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signed int tmp;
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__asm__ __volatile__(
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"eieio # read_unlock\n\
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1: lwarx %0,0,%1\n\
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addic %0,%0,-1\n"
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PPC405_ERR77(0,%1)
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" stwcx. %0,0,%1\n\
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bne- 1b"
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: "=&r"(tmp)
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: "r"(&rw->lock)
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: "cr0", "memory");
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}
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static __inline__ int _raw_write_trylock(rwlock_t *rw)
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{
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signed int tmp;
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__asm__ __volatile__(
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"2: lwarx %0,0,%1 # write_trylock\n\
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cmpwi 0,%0,0\n\
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bne- 1f\n"
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PPC405_ERR77(0,%1)
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" stwcx. %2,0,%1\n\
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bne- 2b\n\
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isync\n\
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1:"
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: "=&r"(tmp)
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: "r"(&rw->lock), "r"(-1)
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: "cr0", "memory");
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return tmp == 0;
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}
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static __inline__ void _raw_write_lock(rwlock_t *rw)
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{
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signed int tmp;
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__asm__ __volatile__(
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"b 2f # write_lock\n\
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1: lwzx %0,0,%1\n\
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cmpwi 0,%0,0\n\
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bne+ 1b\n\
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2: lwarx %0,0,%1\n\
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cmpwi 0,%0,0\n\
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bne- 1b\n"
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PPC405_ERR77(0,%1)
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" stwcx. %2,0,%1\n\
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bne- 2b\n\
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isync"
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: "=&r"(tmp)
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: "r"(&rw->lock), "r"(-1)
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: "cr0", "memory");
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}
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static __inline__ void _raw_write_unlock(rwlock_t *rw)
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{
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__asm__ __volatile__("eieio # write_unlock": : :"memory");
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rw->lock = 0;
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}
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#else
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extern void _raw_read_lock(rwlock_t *rw);
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extern void _raw_read_unlock(rwlock_t *rw);
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extern void _raw_write_lock(rwlock_t *rw);
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extern void _raw_write_unlock(rwlock_t *rw);
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extern int _raw_read_trylock(rwlock_t *rw);
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extern int _raw_write_trylock(rwlock_t *rw);
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#endif
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#endif /* __ASM_SPINLOCK_H */
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#endif /* __KERNEL__ */
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