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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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a6eb9fe105
Now each architecture has the own dma_get_cache_alignment implementation. dma_get_cache_alignment returns the minimum DMA alignment. Architectures define it as ARCH_KMALLOC_MINALIGN (it's used to make sure that malloc'ed buffer is DMA-safe; the buffer doesn't share a cache with the others). So we can unify dma_get_cache_alignment implementations. This patch: dma_get_cache_alignment() needs to know if an architecture defines ARCH_KMALLOC_MINALIGN or not (needs to know if architecture has DMA alignment restriction). However, slab.h define ARCH_KMALLOC_MINALIGN if architectures doesn't define it. Let's rename ARCH_KMALLOC_MINALIGN to ARCH_DMA_MINALIGN. ARCH_KMALLOC_MINALIGN is used only in the internals of slab/slob/slub (except for crypto). Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Cc: <linux-arch@vger.kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
39 lines
972 B
C
39 lines
972 B
C
#ifndef __ASM_AVR32_CACHE_H
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#define __ASM_AVR32_CACHE_H
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#define L1_CACHE_SHIFT 5
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#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
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/*
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* Memory returned by kmalloc() may be used for DMA, so we must make
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* sure that all such allocations are cache aligned. Otherwise,
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* unrelated code may cause parts of the buffer to be read into the
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* cache before the transfer is done, causing old data to be seen by
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* the CPU.
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*/
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#define ARCH_DMA_MINALIGN L1_CACHE_BYTES
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#ifndef __ASSEMBLER__
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struct cache_info {
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unsigned int ways;
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unsigned int sets;
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unsigned int linesz;
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};
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#endif /* __ASSEMBLER */
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/* Cache operation constants */
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#define ICACHE_FLUSH 0x00
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#define ICACHE_INVALIDATE 0x01
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#define ICACHE_LOCK 0x02
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#define ICACHE_UNLOCK 0x03
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#define ICACHE_PREFETCH 0x04
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#define DCACHE_FLUSH 0x08
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#define DCACHE_LOCK 0x09
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#define DCACHE_UNLOCK 0x0a
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#define DCACHE_INVALIDATE 0x0b
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#define DCACHE_CLEAN 0x0c
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#define DCACHE_CLEAN_INVAL 0x0d
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#endif /* __ASM_AVR32_CACHE_H */
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