mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-04 05:16:44 +07:00
2f22d22ea7
Fix this sparse warnings:
drivers/net/qlge/qlge_ethtool.c💯6: warning: symbol 'ql_update_stats' was not declared. Should it be static?
drivers/net/qlge/qlge_mpi.c:22:5: warning: symbol 'ql_get_mb_sts' was not declared. Should it be static?
Signed-off-by: Hannes Eder <hannes@hanneseder.net>
Signed-off-by: David S. Miller <davem@davemloft.net>
151 lines
3.8 KiB
C
151 lines
3.8 KiB
C
#include "qlge.h"
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static int ql_read_mbox_reg(struct ql_adapter *qdev, u32 reg, u32 *data)
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{
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int status;
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/* wait for reg to come ready */
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status = ql_wait_reg_rdy(qdev, PROC_ADDR, PROC_ADDR_RDY, PROC_ADDR_ERR);
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if (status)
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goto exit;
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/* set up for reg read */
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ql_write32(qdev, PROC_ADDR, reg | PROC_ADDR_R);
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/* wait for reg to come ready */
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status = ql_wait_reg_rdy(qdev, PROC_ADDR, PROC_ADDR_RDY, PROC_ADDR_ERR);
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if (status)
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goto exit;
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/* get the data */
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*data = ql_read32(qdev, PROC_DATA);
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exit:
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return status;
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}
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static int ql_get_mb_sts(struct ql_adapter *qdev, struct mbox_params *mbcp)
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{
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int i, status;
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status = ql_sem_spinlock(qdev, SEM_PROC_REG_MASK);
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if (status)
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return -EBUSY;
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for (i = 0; i < mbcp->out_count; i++) {
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status =
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ql_read_mbox_reg(qdev, qdev->mailbox_out + i,
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&mbcp->mbox_out[i]);
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if (status) {
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QPRINTK(qdev, DRV, ERR, "Failed mailbox read.\n");
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break;
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}
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}
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ql_sem_unlock(qdev, SEM_PROC_REG_MASK); /* does flush too */
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return status;
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}
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static void ql_link_up(struct ql_adapter *qdev, struct mbox_params *mbcp)
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{
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mbcp->out_count = 2;
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if (ql_get_mb_sts(qdev, mbcp))
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goto exit;
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qdev->link_status = mbcp->mbox_out[1];
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QPRINTK(qdev, DRV, ERR, "Link Up.\n");
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QPRINTK(qdev, DRV, INFO, "Link Status = 0x%.08x.\n", mbcp->mbox_out[1]);
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if (!netif_carrier_ok(qdev->ndev)) {
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QPRINTK(qdev, LINK, INFO, "Link is Up.\n");
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netif_carrier_on(qdev->ndev);
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netif_wake_queue(qdev->ndev);
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}
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exit:
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/* Clear the MPI firmware status. */
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ql_write32(qdev, CSR, CSR_CMD_CLR_R2PCI_INT);
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}
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static void ql_link_down(struct ql_adapter *qdev, struct mbox_params *mbcp)
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{
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mbcp->out_count = 3;
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if (ql_get_mb_sts(qdev, mbcp)) {
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QPRINTK(qdev, DRV, ERR, "Firmware did not initialize!\n");
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goto exit;
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}
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if (netif_carrier_ok(qdev->ndev)) {
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QPRINTK(qdev, LINK, INFO, "Link is Down.\n");
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netif_carrier_off(qdev->ndev);
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netif_stop_queue(qdev->ndev);
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}
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QPRINTK(qdev, DRV, ERR, "Link Down.\n");
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QPRINTK(qdev, DRV, ERR, "Link Status = 0x%.08x.\n", mbcp->mbox_out[1]);
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exit:
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/* Clear the MPI firmware status. */
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ql_write32(qdev, CSR, CSR_CMD_CLR_R2PCI_INT);
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}
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static void ql_init_fw_done(struct ql_adapter *qdev, struct mbox_params *mbcp)
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{
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mbcp->out_count = 2;
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if (ql_get_mb_sts(qdev, mbcp)) {
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QPRINTK(qdev, DRV, ERR, "Firmware did not initialize!\n");
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goto exit;
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}
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QPRINTK(qdev, DRV, ERR, "Firmware initialized!\n");
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QPRINTK(qdev, DRV, ERR, "Firmware status = 0x%.08x.\n",
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mbcp->mbox_out[0]);
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QPRINTK(qdev, DRV, ERR, "Firmware Revision = 0x%.08x.\n",
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mbcp->mbox_out[1]);
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exit:
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/* Clear the MPI firmware status. */
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ql_write32(qdev, CSR, CSR_CMD_CLR_R2PCI_INT);
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}
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void ql_mpi_work(struct work_struct *work)
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{
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struct ql_adapter *qdev =
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container_of(work, struct ql_adapter, mpi_work.work);
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struct mbox_params mbc;
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struct mbox_params *mbcp = &mbc;
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mbcp->out_count = 1;
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while (ql_read32(qdev, STS) & STS_PI) {
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if (ql_get_mb_sts(qdev, mbcp)) {
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QPRINTK(qdev, DRV, ERR,
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"Could not read MPI, resetting ASIC!\n");
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ql_queue_asic_error(qdev);
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}
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switch (mbcp->mbox_out[0]) {
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case AEN_LINK_UP:
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ql_link_up(qdev, mbcp);
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break;
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case AEN_LINK_DOWN:
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ql_link_down(qdev, mbcp);
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break;
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case AEN_FW_INIT_DONE:
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ql_init_fw_done(qdev, mbcp);
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break;
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case MB_CMD_STS_GOOD:
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break;
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case AEN_FW_INIT_FAIL:
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case AEN_SYS_ERR:
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case MB_CMD_STS_ERR:
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ql_queue_fw_error(qdev);
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default:
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/* Clear the MPI firmware status. */
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ql_write32(qdev, CSR, CSR_CMD_CLR_R2PCI_INT);
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break;
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}
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}
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ql_enable_completion_interrupt(qdev, 0);
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}
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void ql_mpi_reset_work(struct work_struct *work)
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{
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struct ql_adapter *qdev =
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container_of(work, struct ql_adapter, mpi_reset_work.work);
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QPRINTK(qdev, DRV, ERR,
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"Enter, qdev = %p..\n", qdev);
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ql_write32(qdev, CSR, CSR_CMD_SET_RST);
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msleep(50);
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ql_write32(qdev, CSR, CSR_CMD_CLR_RST);
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}
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