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e559355a9d
Based on 1 normalized pattern(s): this program is free software and is provided to you under the terms of the gnu general public license version 2 as published by the free software foundation and any use by you of this program is subject to the terms of such gnu licence extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 13 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Armijn Hemel <armijn@tjaldur.nl> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190531190115.691558990@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
105 lines
2.7 KiB
C
105 lines
2.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* (C) COPYRIGHT 2016 ARM Limited. All rights reserved.
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* Author: Liviu Dudau <Liviu.Dudau@arm.com>
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*
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* ARM Mali DP500/DP550/DP650 KMS/DRM driver structures
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*/
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#ifndef __MALIDP_DRV_H__
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#define __MALIDP_DRV_H__
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#include <drm/drm_writeback.h>
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#include <drm/drm_encoder.h>
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#include <linux/mutex.h>
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#include <linux/wait.h>
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#include <linux/spinlock.h>
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#include <drm/drmP.h>
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#include "malidp_hw.h"
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#define MALIDP_CONFIG_VALID_INIT 0
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#define MALIDP_CONFIG_VALID_DONE 1
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#define MALIDP_CONFIG_START 0xd0
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struct malidp_error_stats {
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s32 num_errors;
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u32 last_error_status;
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s64 last_error_vblank;
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};
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struct malidp_drm {
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struct malidp_hw_device *dev;
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struct drm_crtc crtc;
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struct drm_writeback_connector mw_connector;
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wait_queue_head_t wq;
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struct drm_pending_vblank_event *event;
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atomic_t config_valid;
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u32 core_id;
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#ifdef CONFIG_DEBUG_FS
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struct malidp_error_stats de_errors;
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struct malidp_error_stats se_errors;
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/* Protects errors stats */
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spinlock_t errors_lock;
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#endif
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};
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#define crtc_to_malidp_device(x) container_of(x, struct malidp_drm, crtc)
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struct malidp_plane {
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struct drm_plane base;
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struct malidp_hw_device *hwdev;
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const struct malidp_layer *layer;
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};
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enum mmu_prefetch_mode {
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MALIDP_PREFETCH_MODE_NONE,
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MALIDP_PREFETCH_MODE_PARTIAL,
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MALIDP_PREFETCH_MODE_FULL,
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};
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struct malidp_plane_state {
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struct drm_plane_state base;
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/* size of the required rotation memory if plane is rotated */
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u32 rotmem_size;
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/* internal format ID */
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u8 format;
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u8 n_planes;
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enum mmu_prefetch_mode mmu_prefetch_mode;
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u32 mmu_prefetch_pgsize;
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};
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#define to_malidp_plane(x) container_of(x, struct malidp_plane, base)
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#define to_malidp_plane_state(x) container_of(x, struct malidp_plane_state, base)
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struct malidp_crtc_state {
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struct drm_crtc_state base;
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u32 gamma_coeffs[MALIDP_COEFFTAB_NUM_COEFFS];
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u32 coloradj_coeffs[MALIDP_COLORADJ_NUM_COEFFS];
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struct malidp_se_config scaler_config;
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/* Bitfield of all the planes that have requested a scaled output. */
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u8 scaled_planes_mask;
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};
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#define to_malidp_crtc_state(x) container_of(x, struct malidp_crtc_state, base)
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int malidp_de_planes_init(struct drm_device *drm);
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int malidp_crtc_init(struct drm_device *drm);
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bool malidp_hw_format_is_linear_only(u32 format);
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bool malidp_hw_format_is_afbc_only(u32 format);
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bool malidp_format_mod_supported(struct drm_device *drm,
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u32 format, u64 modifier);
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#ifdef CONFIG_DEBUG_FS
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void malidp_error(struct malidp_drm *malidp,
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struct malidp_error_stats *error_stats, u32 status,
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u64 vblank);
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#endif
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/* often used combination of rotational bits */
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#define MALIDP_ROTATED_MASK (DRM_MODE_ROTATE_90 | DRM_MODE_ROTATE_270)
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#endif /* __MALIDP_DRV_H__ */
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