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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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d23c808c6f
When 52-bit virtual addressing is enabled for userspace (CONFIG_ARM64_USER_VA_BITS_52=y), the kernel continues to utilise 48-bit virtual addressing in TTBR1. Consequently, PTRS_PER_PGD reflects the larger page table size for userspace and the pgd pointer for kernel page tables is offset before being written to TTBR1. This means that we can't use PTRS_PER_PGD to iterate over kernel page tables unless we apply the same offset, which is fiddly to get right and leads to some non-idiomatic walking code. Instead, just follow the usual pattern when walking page tables by using a while loop driven by pXd_offset() and pXd_addr_end(). Reported-by: Qian Cai <cai@lca.pw> Tested-by: Qian Cai <cai@lca.pw> Acked-by: Steve Capper <steve.capper@arm.com> Tested-by: Steve Capper <steve.capper@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> |
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| .. | ||
| cache.S | ||
| context.c | ||
| copypage.c | ||
| dma-mapping.c | ||
| dump.c | ||
| extable.c | ||
| fault.c | ||
| flush.c | ||
| hugetlbpage.c | ||
| init.c | ||
| ioremap.c | ||
| kasan_init.c | ||
| Makefile | ||
| mmap.c | ||
| mmu.c | ||
| numa.c | ||
| pageattr.c | ||
| pgd.c | ||
| physaddr.c | ||
| proc.S | ||
| ptdump_debugfs.c | ||