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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-16 11:56:46 +07:00
2922d1cc16
The GPIO SPI master has some code in its local CS
callback to set the initial sck GPIO value. This was
lost in the commit converting it to use SPI core
GPIO handling as this callback isn't called if the
internal GPIO handling is active.
Add the special SPI_MASTER_GPIO_SS to ascertain it
gets called anyway so we get the initial SCK setting
right. There is some platform provided GPIO handling
there as well but this will be skipped as the cs_gpios
will be NULL.
My test targets seem not to care about the initial
SCK value so I am uncertain if this is a regression,
but to preserve the previous semantic we better do
this.
Cc: Andrey Smirnov <andrew.smirnov@gmail.com>
Fixes: 249e2632dc
("spi: gpio: Don't request CS GPIO in DT use-case")
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20190716204651.7743-1-linus.walleij@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
456 lines
13 KiB
C
456 lines
13 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* SPI master driver using generic bitbanged GPIO
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*
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* Copyright (C) 2006,2008 David Brownell
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* Copyright (C) 2017 Linus Walleij
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/gpio/consumer.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/spi/spi.h>
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#include <linux/spi/spi_bitbang.h>
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#include <linux/spi/spi_gpio.h>
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/*
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* This bitbanging SPI master driver should help make systems usable
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* when a native hardware SPI engine is not available, perhaps because
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* its driver isn't yet working or because the I/O pins it requires
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* are used for other purposes.
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*
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* platform_device->driver_data ... points to spi_gpio
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*
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* spi->controller_state ... reserved for bitbang framework code
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*
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* spi->master->dev.driver_data ... points to spi_gpio->bitbang
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*/
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struct spi_gpio {
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struct spi_bitbang bitbang;
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struct gpio_desc *sck;
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struct gpio_desc *miso;
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struct gpio_desc *mosi;
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struct gpio_desc **cs_gpios;
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};
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/*----------------------------------------------------------------------*/
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/*
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* Because the overhead of going through four GPIO procedure calls
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* per transferred bit can make performance a problem, this code
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* is set up so that you can use it in either of two ways:
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*
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* - The slow generic way: set up platform_data to hold the GPIO
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* numbers used for MISO/MOSI/SCK, and issue procedure calls for
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* each of them. This driver can handle several such busses.
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*
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* - The quicker inlined way: only helps with platform GPIO code
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* that inlines operations for constant GPIOs. This can give
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* you tight (fast!) inner loops, but each such bus needs a
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* new driver. You'll define a new C file, with Makefile and
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* Kconfig support; the C code can be a total of six lines:
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*
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* #define DRIVER_NAME "myboard_spi2"
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* #define SPI_MISO_GPIO 119
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* #define SPI_MOSI_GPIO 120
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* #define SPI_SCK_GPIO 121
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* #define SPI_N_CHIPSEL 4
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* #include "spi-gpio.c"
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*/
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#ifndef DRIVER_NAME
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#define DRIVER_NAME "spi_gpio"
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#define GENERIC_BITBANG /* vs tight inlines */
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#endif
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/*----------------------------------------------------------------------*/
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static inline struct spi_gpio *__pure
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spi_to_spi_gpio(const struct spi_device *spi)
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{
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const struct spi_bitbang *bang;
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struct spi_gpio *spi_gpio;
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bang = spi_master_get_devdata(spi->master);
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spi_gpio = container_of(bang, struct spi_gpio, bitbang);
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return spi_gpio;
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}
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/* These helpers are in turn called by the bitbang inlines */
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static inline void setsck(const struct spi_device *spi, int is_on)
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{
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struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
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gpiod_set_value_cansleep(spi_gpio->sck, is_on);
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}
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static inline void setmosi(const struct spi_device *spi, int is_on)
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{
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struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
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gpiod_set_value_cansleep(spi_gpio->mosi, is_on);
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}
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static inline int getmiso(const struct spi_device *spi)
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{
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struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
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if (spi->mode & SPI_3WIRE)
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return !!gpiod_get_value_cansleep(spi_gpio->mosi);
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else
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return !!gpiod_get_value_cansleep(spi_gpio->miso);
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}
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/*
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* NOTE: this clocks "as fast as we can". It "should" be a function of the
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* requested device clock. Software overhead means we usually have trouble
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* reaching even one Mbit/sec (except when we can inline bitops), so for now
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* we'll just assume we never need additional per-bit slowdowns.
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*/
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#define spidelay(nsecs) do {} while (0)
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#include "spi-bitbang-txrx.h"
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/*
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* These functions can leverage inline expansion of GPIO calls to shrink
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* costs for a txrx bit, often by factors of around ten (by instruction
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* count). That is particularly visible for larger word sizes, but helps
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* even with default 8-bit words.
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*
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* REVISIT overheads calling these functions for each word also have
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* significant performance costs. Having txrx_bufs() calls that inline
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* the txrx_word() logic would help performance, e.g. on larger blocks
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* used with flash storage or MMC/SD. There should also be ways to make
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* GCC be less stupid about reloading registers inside the I/O loops,
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* even without inlined GPIO calls; __attribute__((hot)) on GCC 4.3?
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*/
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static u32 spi_gpio_txrx_word_mode0(struct spi_device *spi,
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unsigned nsecs, u32 word, u8 bits, unsigned flags)
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{
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return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits);
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}
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static u32 spi_gpio_txrx_word_mode1(struct spi_device *spi,
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unsigned nsecs, u32 word, u8 bits, unsigned flags)
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{
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return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits);
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}
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static u32 spi_gpio_txrx_word_mode2(struct spi_device *spi,
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unsigned nsecs, u32 word, u8 bits, unsigned flags)
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{
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return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits);
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}
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static u32 spi_gpio_txrx_word_mode3(struct spi_device *spi,
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unsigned nsecs, u32 word, u8 bits, unsigned flags)
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{
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return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits);
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}
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/*
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* These functions do not call setmosi or getmiso if respective flag
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* (SPI_MASTER_NO_RX or SPI_MASTER_NO_TX) is set, so they are safe to
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* call when such pin is not present or defined in the controller.
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* A separate set of callbacks is defined to get highest possible
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* speed in the generic case (when both MISO and MOSI lines are
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* available), as optimiser will remove the checks when argument is
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* constant.
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*/
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static u32 spi_gpio_spec_txrx_word_mode0(struct spi_device *spi,
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unsigned nsecs, u32 word, u8 bits, unsigned flags)
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{
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flags = spi->master->flags;
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return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits);
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}
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static u32 spi_gpio_spec_txrx_word_mode1(struct spi_device *spi,
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unsigned nsecs, u32 word, u8 bits, unsigned flags)
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{
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flags = spi->master->flags;
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return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits);
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}
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static u32 spi_gpio_spec_txrx_word_mode2(struct spi_device *spi,
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unsigned nsecs, u32 word, u8 bits, unsigned flags)
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{
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flags = spi->master->flags;
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return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits);
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}
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static u32 spi_gpio_spec_txrx_word_mode3(struct spi_device *spi,
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unsigned nsecs, u32 word, u8 bits, unsigned flags)
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{
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flags = spi->master->flags;
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return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits);
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}
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/*----------------------------------------------------------------------*/
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static void spi_gpio_chipselect(struct spi_device *spi, int is_active)
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{
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struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
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/* set initial clock line level */
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if (is_active)
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gpiod_set_value_cansleep(spi_gpio->sck, spi->mode & SPI_CPOL);
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/* Drive chip select line, if we have one */
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if (spi_gpio->cs_gpios) {
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struct gpio_desc *cs = spi_gpio->cs_gpios[spi->chip_select];
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/* SPI chip selects are normally active-low */
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gpiod_set_value_cansleep(cs, (spi->mode & SPI_CS_HIGH) ? is_active : !is_active);
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}
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}
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static int spi_gpio_setup(struct spi_device *spi)
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{
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struct gpio_desc *cs;
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int status = 0;
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struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
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/*
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* The CS GPIOs have already been
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* initialized from the descriptor lookup.
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*/
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if (spi_gpio->cs_gpios) {
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cs = spi_gpio->cs_gpios[spi->chip_select];
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if (!spi->controller_state && cs)
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status = gpiod_direction_output(cs,
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!(spi->mode & SPI_CS_HIGH));
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}
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if (!status)
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status = spi_bitbang_setup(spi);
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return status;
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}
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static int spi_gpio_set_direction(struct spi_device *spi, bool output)
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{
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struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
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int ret;
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if (output)
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return gpiod_direction_output(spi_gpio->mosi, 1);
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ret = gpiod_direction_input(spi_gpio->mosi);
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if (ret)
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return ret;
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/*
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* Send a turnaround high impedance cycle when switching
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* from output to input. Theoretically there should be
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* a clock delay here, but as has been noted above, the
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* nsec delay function for bit-banged GPIO is simply
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* {} because bit-banging just doesn't get fast enough
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* anyway.
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*/
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if (spi->mode & SPI_3WIRE_HIZ) {
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gpiod_set_value_cansleep(spi_gpio->sck,
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!(spi->mode & SPI_CPOL));
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gpiod_set_value_cansleep(spi_gpio->sck,
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!!(spi->mode & SPI_CPOL));
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}
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return 0;
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}
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static void spi_gpio_cleanup(struct spi_device *spi)
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{
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spi_bitbang_cleanup(spi);
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}
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/*
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* It can be convenient to use this driver with pins that have alternate
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* functions associated with a "native" SPI controller if a driver for that
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* controller is not available, or is missing important functionality.
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*
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* On platforms which can do so, configure MISO with a weak pullup unless
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* there's an external pullup on that signal. That saves power by avoiding
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* floating signals. (A weak pulldown would save power too, but many
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* drivers expect to see all-ones data as the no slave "response".)
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*/
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static int spi_gpio_request(struct device *dev, struct spi_gpio *spi_gpio)
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{
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spi_gpio->mosi = devm_gpiod_get_optional(dev, "mosi", GPIOD_OUT_LOW);
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if (IS_ERR(spi_gpio->mosi))
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return PTR_ERR(spi_gpio->mosi);
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spi_gpio->miso = devm_gpiod_get_optional(dev, "miso", GPIOD_IN);
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if (IS_ERR(spi_gpio->miso))
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return PTR_ERR(spi_gpio->miso);
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spi_gpio->sck = devm_gpiod_get(dev, "sck", GPIOD_OUT_LOW);
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if (IS_ERR(spi_gpio->sck))
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return PTR_ERR(spi_gpio->sck);
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return 0;
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}
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#ifdef CONFIG_OF
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static const struct of_device_id spi_gpio_dt_ids[] = {
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{ .compatible = "spi-gpio" },
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{}
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};
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MODULE_DEVICE_TABLE(of, spi_gpio_dt_ids);
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static int spi_gpio_probe_dt(struct platform_device *pdev,
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struct spi_master *master)
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{
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master->dev.of_node = pdev->dev.of_node;
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master->use_gpio_descriptors = true;
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return 0;
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}
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#else
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static inline int spi_gpio_probe_dt(struct platform_device *pdev,
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struct spi_master *master)
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{
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return 0;
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}
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#endif
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static int spi_gpio_probe_pdata(struct platform_device *pdev,
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struct spi_master *master)
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{
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struct device *dev = &pdev->dev;
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struct spi_gpio_platform_data *pdata = dev_get_platdata(dev);
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struct spi_gpio *spi_gpio = spi_master_get_devdata(master);
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int i;
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#ifdef GENERIC_BITBANG
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if (!pdata || !pdata->num_chipselect)
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return -ENODEV;
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#endif
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/*
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* The master needs to think there is a chipselect even if not
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* connected
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*/
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master->num_chipselect = pdata->num_chipselect ?: 1;
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spi_gpio->cs_gpios = devm_kcalloc(dev, master->num_chipselect,
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sizeof(*spi_gpio->cs_gpios),
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GFP_KERNEL);
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if (!spi_gpio->cs_gpios)
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return -ENOMEM;
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for (i = 0; i < master->num_chipselect; i++) {
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spi_gpio->cs_gpios[i] = devm_gpiod_get_index(dev, "cs", i,
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GPIOD_OUT_HIGH);
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if (IS_ERR(spi_gpio->cs_gpios[i]))
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return PTR_ERR(spi_gpio->cs_gpios[i]);
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}
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return 0;
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}
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static void spi_gpio_put(void *data)
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{
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spi_master_put(data);
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}
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static int spi_gpio_probe(struct platform_device *pdev)
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{
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int status;
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struct spi_master *master;
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struct spi_gpio *spi_gpio;
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struct device *dev = &pdev->dev;
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struct spi_bitbang *bb;
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const struct of_device_id *of_id;
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of_id = of_match_device(spi_gpio_dt_ids, &pdev->dev);
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master = spi_alloc_master(dev, sizeof(*spi_gpio));
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if (!master)
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return -ENOMEM;
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status = devm_add_action_or_reset(&pdev->dev, spi_gpio_put, master);
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if (status)
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return status;
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if (of_id)
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status = spi_gpio_probe_dt(pdev, master);
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else
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status = spi_gpio_probe_pdata(pdev, master);
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if (status)
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return status;
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spi_gpio = spi_master_get_devdata(master);
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status = spi_gpio_request(dev, spi_gpio);
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if (status)
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return status;
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master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32);
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master->mode_bits = SPI_3WIRE | SPI_3WIRE_HIZ | SPI_CPHA | SPI_CPOL |
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SPI_CS_HIGH;
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if (!spi_gpio->mosi) {
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/* HW configuration without MOSI pin
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*
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* No setting SPI_MASTER_NO_RX here - if there is only
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* a MOSI pin connected the host can still do RX by
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* changing the direction of the line.
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*/
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master->flags = SPI_MASTER_NO_TX;
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}
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master->bus_num = pdev->id;
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master->setup = spi_gpio_setup;
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master->cleanup = spi_gpio_cleanup;
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bb = &spi_gpio->bitbang;
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bb->master = master;
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/*
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* There is some additional business, apart from driving the CS GPIO
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* line, that we need to do on selection. This makes the local
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* callback for chipselect always get called.
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*/
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master->flags |= SPI_MASTER_GPIO_SS;
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bb->chipselect = spi_gpio_chipselect;
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bb->set_line_direction = spi_gpio_set_direction;
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if (master->flags & SPI_MASTER_NO_TX) {
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bb->txrx_word[SPI_MODE_0] = spi_gpio_spec_txrx_word_mode0;
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bb->txrx_word[SPI_MODE_1] = spi_gpio_spec_txrx_word_mode1;
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bb->txrx_word[SPI_MODE_2] = spi_gpio_spec_txrx_word_mode2;
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bb->txrx_word[SPI_MODE_3] = spi_gpio_spec_txrx_word_mode3;
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} else {
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bb->txrx_word[SPI_MODE_0] = spi_gpio_txrx_word_mode0;
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bb->txrx_word[SPI_MODE_1] = spi_gpio_txrx_word_mode1;
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bb->txrx_word[SPI_MODE_2] = spi_gpio_txrx_word_mode2;
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bb->txrx_word[SPI_MODE_3] = spi_gpio_txrx_word_mode3;
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}
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bb->setup_transfer = spi_bitbang_setup_transfer;
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status = spi_bitbang_init(&spi_gpio->bitbang);
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if (status)
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return status;
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return devm_spi_register_master(&pdev->dev, spi_master_get(master));
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}
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MODULE_ALIAS("platform:" DRIVER_NAME);
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static struct platform_driver spi_gpio_driver = {
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.driver = {
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.name = DRIVER_NAME,
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.of_match_table = of_match_ptr(spi_gpio_dt_ids),
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},
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.probe = spi_gpio_probe,
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};
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module_platform_driver(spi_gpio_driver);
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MODULE_DESCRIPTION("SPI master driver using generic bitbanged GPIO ");
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MODULE_AUTHOR("David Brownell");
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MODULE_LICENSE("GPL");
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