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07999587b7
Update all the Tegra DT bindings to require resets/reset-names properties where the HW module has reset inputs. Remove any entries from clocks or clock-names that were only required to identify reset inputs, rather than referring to real clocks. This is a DT-ABI-incompatible change. It is the first of two changes required for me to consider the Tegra DT bindings as stable, the other being conversion to the common DMA DT bindings. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-By: Terje Bergstrom <tbergstrom@nvidia.com>
25 lines
758 B
Plaintext
25 lines
758 B
Plaintext
NVIDIA Tegra30 I2S controller
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Required properties:
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- compatible : "nvidia,tegra30-i2s"
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- reg : Should contain I2S registers location and length
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- clocks : Must contain one entry, for the module clock.
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See ../clocks/clock-bindings.txt for details.
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- resets : Must contain an entry for each entry in reset-names.
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See ../reset/reset.txt for details.
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- reset-names : Must include the following entries:
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- i2s
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- nvidia,ahub-cif-ids : The list of AHUB CIF IDs for this port, rx (playback)
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first, tx (capture) second. See nvidia,tegra30-ahub.txt for values.
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Example:
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i2s@70080300 {
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compatible = "nvidia,tegra30-i2s";
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reg = <0x70080300 0x100>;
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nvidia,ahub-cif-ids = <4 4>;
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clocks = <&tegra_car 11>;
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resets = <&tegra_car 11>;
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reset-names = "i2s";
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};
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