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The Allwinner A20 has an ethernet controller that seems to be an early version of Synopsys DesignWare MAC 10/100/1000 Universal, which is supported by the stmmac driver. Allwinner's GMAC requires setting additional registers in the SoC's clock control unit. The exact version of the DWMAC IP that Allwinner uses is unknown, thus the exact feature set is unknown. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: David S. Miller <davem@davemloft.net>
28 lines
816 B
Plaintext
28 lines
816 B
Plaintext
* Allwinner GMAC ethernet controller
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This device is a platform glue layer for stmmac.
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Please see stmmac.txt for the other unchanged properties.
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Required properties:
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- compatible: Should be "allwinner,sun7i-a20-gmac"
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- clocks: Should contain the GMAC main clock, and tx clock
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The tx clock type should be "allwinner,sun7i-a20-gmac-clk"
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- clock-names: Should contain the clock names "stmmaceth",
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and "allwinner_gmac_tx"
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Optional properties:
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- phy-supply: phandle to a regulator if the PHY needs one
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Examples:
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gmac: ethernet@01c50000 {
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compatible = "allwinner,sun7i-a20-gmac";
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reg = <0x01c50000 0x10000>,
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<0x01c20164 0x4>;
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interrupts = <0 85 1>;
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interrupt-names = "macirq";
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clocks = <&ahb_gates 49>, <&gmac_tx>;
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clock-names = "stmmaceth", "allwinner_gmac_tx";
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phy-mode = "mii";
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};
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