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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-30 12:16:45 +07:00
45dbea5f55
While chasing a regression I noticed we potentially patch the wrong
code in native_patch().
If we do not select the native code sequence, we must use the default
patcher, not fall-through the switch case.
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Alok Kataria <akataria@vmware.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Chris Wright <chrisw@sous-sol.org>
Cc: Jeremy Fitzhardinge <jeremy@goop.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Pan Xinhui <xinhui.pan@linux.vnet.ibm.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Peter Anvin <hpa@zytor.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Rusty Russell <rusty@rustcorp.com.au>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: kernel test robot <xiaolong.ye@intel.com>
Fixes: 3cded41794 ("x86/paravirt: Optimize native pv_lock_ops.vcpu_is_preempted()")
Link: http://lkml.kernel.org/r/20161208154349.270616999@infradead.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
84 lines
2.3 KiB
C
84 lines
2.3 KiB
C
#include <asm/paravirt.h>
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DEF_NATIVE(pv_irq_ops, irq_disable, "cli");
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DEF_NATIVE(pv_irq_ops, irq_enable, "sti");
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DEF_NATIVE(pv_irq_ops, restore_fl, "push %eax; popf");
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DEF_NATIVE(pv_irq_ops, save_fl, "pushf; pop %eax");
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DEF_NATIVE(pv_cpu_ops, iret, "iret");
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DEF_NATIVE(pv_mmu_ops, read_cr2, "mov %cr2, %eax");
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DEF_NATIVE(pv_mmu_ops, write_cr3, "mov %eax, %cr3");
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DEF_NATIVE(pv_mmu_ops, read_cr3, "mov %cr3, %eax");
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DEF_NATIVE(pv_cpu_ops, clts, "clts");
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#if defined(CONFIG_PARAVIRT_SPINLOCKS)
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DEF_NATIVE(pv_lock_ops, queued_spin_unlock, "movb $0, (%eax)");
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DEF_NATIVE(pv_lock_ops, vcpu_is_preempted, "xor %eax, %eax");
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#endif
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unsigned paravirt_patch_ident_32(void *insnbuf, unsigned len)
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{
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/* arg in %eax, return in %eax */
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return 0;
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}
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unsigned paravirt_patch_ident_64(void *insnbuf, unsigned len)
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{
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/* arg in %edx:%eax, return in %edx:%eax */
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return 0;
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}
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extern bool pv_is_native_spin_unlock(void);
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extern bool pv_is_native_vcpu_is_preempted(void);
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unsigned native_patch(u8 type, u16 clobbers, void *ibuf,
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unsigned long addr, unsigned len)
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{
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const unsigned char *start, *end;
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unsigned ret;
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#define PATCH_SITE(ops, x) \
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case PARAVIRT_PATCH(ops.x): \
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start = start_##ops##_##x; \
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end = end_##ops##_##x; \
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goto patch_site
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switch (type) {
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PATCH_SITE(pv_irq_ops, irq_disable);
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PATCH_SITE(pv_irq_ops, irq_enable);
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PATCH_SITE(pv_irq_ops, restore_fl);
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PATCH_SITE(pv_irq_ops, save_fl);
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PATCH_SITE(pv_cpu_ops, iret);
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PATCH_SITE(pv_mmu_ops, read_cr2);
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PATCH_SITE(pv_mmu_ops, read_cr3);
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PATCH_SITE(pv_mmu_ops, write_cr3);
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PATCH_SITE(pv_cpu_ops, clts);
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#if defined(CONFIG_PARAVIRT_SPINLOCKS)
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case PARAVIRT_PATCH(pv_lock_ops.queued_spin_unlock):
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if (pv_is_native_spin_unlock()) {
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start = start_pv_lock_ops_queued_spin_unlock;
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end = end_pv_lock_ops_queued_spin_unlock;
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goto patch_site;
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}
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goto patch_default;
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case PARAVIRT_PATCH(pv_lock_ops.vcpu_is_preempted):
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if (pv_is_native_vcpu_is_preempted()) {
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start = start_pv_lock_ops_vcpu_is_preempted;
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end = end_pv_lock_ops_vcpu_is_preempted;
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goto patch_site;
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}
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goto patch_default;
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#endif
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default:
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patch_default:
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ret = paravirt_patch_default(type, clobbers, ibuf, addr, len);
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break;
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patch_site:
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ret = paravirt_patch_insns(ibuf, len, start, end);
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break;
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}
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#undef PATCH_SITE
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return ret;
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}
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