linux_dsm_epyc7002/arch/arm/boot/dts/gemini-nas4220b.dts
Linus Walleij 95220046a6 ARM: dts: Add ethernet to a bunch of platforms
These platforms have the PHY defined already so we just
need to add a single device node to each of them to activate
the ethernet device.

The PHY skew/delay settings for pin control is known from a
few vendor trees and old OpenWRT patch sets.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-01-17 00:26:50 +01:00

207 lines
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// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree file for the Gemini-based Raidsonic NAS IB-4220-B
*/
/dts-v1/;
#include "gemini.dtsi"
#include <dt-bindings/input/input.h>
/ {
model = "Raidsonic NAS IB-4220-B";
compatible = "raidsonic,ib-4220-b", "cortina,gemini";
#address-cells = <1>;
#size-cells = <1>;
memory { /* 128 MB */
device_type = "memory";
reg = <0x00000000 0x8000000>;
};
chosen {
bootargs = "console=ttyS0,19200n8";
stdout-path = &uart0;
};
gpio_keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
button@29 {
debounce_interval = <50>;
wakeup-source;
linux,code = <KEY_SETUP>;
label = "Backup button";
/* Conflict with TVC */
gpios = <&gpio1 29 GPIO_ACTIVE_LOW>;
};
button@31 {
debounce_interval = <50>;
wakeup-source;
linux,code = <KEY_RESTART>;
label = "Softreset button";
/* Conflict with TVC */
gpios = <&gpio1 31 GPIO_ACTIVE_LOW>;
};
};
leds {
compatible = "gpio-leds";
led@28 {
label = "nas4220b:orange:hdd";
/* Conflict with TVC */
gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
led@30 {
label = "nas4220b:green:os";
/* Conflict with TVC */
gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>;
default-state = "on";
linux,default-trigger = "heartbeat";
};
};
mdio0: ethernet-phy {
compatible = "virtual,mdio-gpio";
gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */
<&gpio0 21 GPIO_ACTIVE_HIGH>; /* MDIO */
#address-cells = <1>;
#size-cells = <0>;
phy0: ethernet-phy@1 {
reg = <1>;
device_type = "ethernet-phy";
};
};
soc {
flash@30000000 {
status = "okay";
/* 16MB of flash */
reg = <0x30000000 0x01000000>;
partition@0 {
label = "RedBoot";
reg = <0x00000000 0x00020000>;
read-only;
};
partition@20000 {
label = "Kernel";
reg = <0x00020000 0x00300000>;
};
partition@320000 {
label = "Ramdisk";
reg = <0x00320000 0x00600000>;
};
partition@920000 {
label = "Application";
reg = <0x00920000 0x00600000>;
};
partition@f20000 {
label = "VCTL";
reg = <0x00f20000 0x00020000>;
read-only;
};
partition@f40000 {
label = "CurConf";
reg = <0x00f40000 0x000a0000>;
read-only;
};
partition@fe0000 {
label = "FIS directory";
reg = <0x00fe0000 0x00020000>;
read-only;
};
};
syscon: syscon@40000000 {
pinctrl {
/*
* gpio1dgrp cover line 28-31 otherwise used
* by TVC.
*/
gpio1_default_pins: pinctrl-gpio1 {
mux {
function = "gpio1";
groups = "gpio1dgrp";
};
};
pinctrl-gmii {
mux {
function = "gmii";
groups = "gmii_gmac0_grp";
};
/* Settings come from OpenWRT */
conf0 {
pins = "R8 GMAC0 RXDV", "U11 GMAC1 RXDV";
skew-delay = <0>;
};
conf1 {
pins = "T8 GMAC0 RXC", "T11 GMAC1 RXC";
skew-delay = <15>;
};
conf2 {
pins = "P8 GMAC0 TXEN", "V11 GMAC1 TXEN";
skew-delay = <7>;
};
conf3 {
pins = "V7 GMAC0 TXC";
skew-delay = <11>;
};
conf4 {
pins = "P10 GMAC1 TXC";
skew-delay = <10>;
};
conf5 {
/* The data lines all have default skew */
pins = "U8 GMAC0 RXD0", "V8 GMAC0 RXD1",
"P9 GMAC0 RXD2", "R9 GMAC0 RXD3",
"U7 GMAC0 TXD0", "T7 GMAC0 TXD1",
"R7 GMAC0 TXD2", "P7 GMAC0 TXD3",
"R11 GMAC1 RXD0", "P11 GMAC1 RXD1",
"V12 GMAC1 RXD2", "U12 GMAC1 RXD3",
"R10 GMAC1 TXD0", "T10 GMAC1 TXD1",
"U10 GMAC1 TXD2", "V10 GMAC1 TXD3";
skew-delay = <7>;
};
/* Set up drive strength on GMAC0 to 16 mA */
conf6 {
groups = "gmii_gmac0_grp";
drive-strength = <16>;
};
};
};
};
sata: sata@46000000 {
cortina,gemini-ata-muxmode = <0>;
cortina,gemini-enable-sata-bridge;
status = "okay";
};
gpio1: gpio@4e000000 {
pinctrl-names = "default";
pinctrl-0 = <&gpio1_default_pins>;
};
ethernet@60000000 {
status = "okay";
ethernet-port@0 {
phy-mode = "rgmii";
phy-handle = <&phy0>;
};
ethernet-port@1 {
/* Not used in this platform */
};
};
ata@63000000 {
status = "okay";
};
};
};