mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-18 21:46:45 +07:00
95220046a6
These platforms have the PHY defined already so we just need to add a single device node to each of them to activate the ethernet device. The PHY skew/delay settings for pin control is known from a few vendor trees and old OpenWRT patch sets. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
207 lines
4.2 KiB
Plaintext
207 lines
4.2 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0
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/*
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* Device Tree file for the Gemini-based Raidsonic NAS IB-4220-B
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*/
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/dts-v1/;
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#include "gemini.dtsi"
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#include <dt-bindings/input/input.h>
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/ {
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model = "Raidsonic NAS IB-4220-B";
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compatible = "raidsonic,ib-4220-b", "cortina,gemini";
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#address-cells = <1>;
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#size-cells = <1>;
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memory { /* 128 MB */
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device_type = "memory";
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reg = <0x00000000 0x8000000>;
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};
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chosen {
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bootargs = "console=ttyS0,19200n8";
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stdout-path = &uart0;
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};
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gpio_keys {
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compatible = "gpio-keys";
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#address-cells = <1>;
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#size-cells = <0>;
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button@29 {
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debounce_interval = <50>;
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wakeup-source;
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linux,code = <KEY_SETUP>;
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label = "Backup button";
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/* Conflict with TVC */
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gpios = <&gpio1 29 GPIO_ACTIVE_LOW>;
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};
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button@31 {
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debounce_interval = <50>;
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wakeup-source;
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linux,code = <KEY_RESTART>;
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label = "Softreset button";
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/* Conflict with TVC */
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gpios = <&gpio1 31 GPIO_ACTIVE_LOW>;
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};
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};
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leds {
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compatible = "gpio-leds";
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led@28 {
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label = "nas4220b:orange:hdd";
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/* Conflict with TVC */
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gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
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default-state = "on";
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};
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led@30 {
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label = "nas4220b:green:os";
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/* Conflict with TVC */
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gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>;
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default-state = "on";
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linux,default-trigger = "heartbeat";
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};
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};
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mdio0: ethernet-phy {
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compatible = "virtual,mdio-gpio";
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gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */
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<&gpio0 21 GPIO_ACTIVE_HIGH>; /* MDIO */
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#address-cells = <1>;
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#size-cells = <0>;
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phy0: ethernet-phy@1 {
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reg = <1>;
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device_type = "ethernet-phy";
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};
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};
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soc {
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flash@30000000 {
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status = "okay";
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/* 16MB of flash */
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reg = <0x30000000 0x01000000>;
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partition@0 {
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label = "RedBoot";
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reg = <0x00000000 0x00020000>;
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read-only;
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};
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partition@20000 {
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label = "Kernel";
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reg = <0x00020000 0x00300000>;
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};
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partition@320000 {
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label = "Ramdisk";
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reg = <0x00320000 0x00600000>;
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};
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partition@920000 {
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label = "Application";
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reg = <0x00920000 0x00600000>;
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};
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partition@f20000 {
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label = "VCTL";
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reg = <0x00f20000 0x00020000>;
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read-only;
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};
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partition@f40000 {
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label = "CurConf";
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reg = <0x00f40000 0x000a0000>;
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read-only;
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};
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partition@fe0000 {
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label = "FIS directory";
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reg = <0x00fe0000 0x00020000>;
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read-only;
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};
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};
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syscon: syscon@40000000 {
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pinctrl {
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/*
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* gpio1dgrp cover line 28-31 otherwise used
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* by TVC.
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*/
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gpio1_default_pins: pinctrl-gpio1 {
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mux {
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function = "gpio1";
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groups = "gpio1dgrp";
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};
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};
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pinctrl-gmii {
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mux {
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function = "gmii";
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groups = "gmii_gmac0_grp";
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};
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/* Settings come from OpenWRT */
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conf0 {
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pins = "R8 GMAC0 RXDV", "U11 GMAC1 RXDV";
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skew-delay = <0>;
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};
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conf1 {
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pins = "T8 GMAC0 RXC", "T11 GMAC1 RXC";
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skew-delay = <15>;
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};
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conf2 {
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pins = "P8 GMAC0 TXEN", "V11 GMAC1 TXEN";
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skew-delay = <7>;
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};
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conf3 {
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pins = "V7 GMAC0 TXC";
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skew-delay = <11>;
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};
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conf4 {
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pins = "P10 GMAC1 TXC";
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skew-delay = <10>;
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};
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conf5 {
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/* The data lines all have default skew */
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pins = "U8 GMAC0 RXD0", "V8 GMAC0 RXD1",
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"P9 GMAC0 RXD2", "R9 GMAC0 RXD3",
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"U7 GMAC0 TXD0", "T7 GMAC0 TXD1",
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"R7 GMAC0 TXD2", "P7 GMAC0 TXD3",
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"R11 GMAC1 RXD0", "P11 GMAC1 RXD1",
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"V12 GMAC1 RXD2", "U12 GMAC1 RXD3",
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"R10 GMAC1 TXD0", "T10 GMAC1 TXD1",
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"U10 GMAC1 TXD2", "V10 GMAC1 TXD3";
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skew-delay = <7>;
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};
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/* Set up drive strength on GMAC0 to 16 mA */
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conf6 {
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groups = "gmii_gmac0_grp";
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drive-strength = <16>;
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};
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};
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};
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};
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sata: sata@46000000 {
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cortina,gemini-ata-muxmode = <0>;
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cortina,gemini-enable-sata-bridge;
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status = "okay";
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};
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gpio1: gpio@4e000000 {
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pinctrl-names = "default";
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pinctrl-0 = <&gpio1_default_pins>;
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};
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ethernet@60000000 {
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status = "okay";
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ethernet-port@0 {
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phy-mode = "rgmii";
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phy-handle = <&phy0>;
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};
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ethernet-port@1 {
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/* Not used in this platform */
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};
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};
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ata@63000000 {
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status = "okay";
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};
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};
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};
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