mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-24 04:47:12 +07:00
d729b900e5
BSC9131RDB is a Freescale reference design board for BSC9131 SoC. The
BSC9131 is integrated SoC that targets Femto base station market. It
combines Power Architecture e500v2 and DSP StarCore SC3850 core
technologies with MAPLE-B2F baseband acceleration processing elements.
The BSC9131 SoC includes the following function and features:
. Power Architecture subsystem including a e500 processor with 256-Kbyte
shared L2 cache
. StarCore SC3850 DSP subsystem with a 512-Kbyte private L2 cache
. The Multi Accelerator Platform Engine for Femto BaseStation Baseband
Processing (MAPLE-B2F)
. A multi-standard baseband algorithm accelerator for Channel
Decoding/Encoding, Fourier Transforms, UMTS chip rate processing, LTE
UP/DL Channel processing, and CRC algorithms
. Consists of accelerators for Convolution, Filtering, Turbo Encoding,
Turbo Decoding, Viterbi decoding, Chiprate processing, and Matrix
Inversion operations
. DDR3/3L memory interface with 32-bit data width without ECC and 16-bit
with ECC, up to 400-MHz clock/800 MHz data rate
. Dedicated security engine featuring trusted boot
. DMA controller
. OCNDMA with four bidirectional channels
. Interfaces
. Two triple-speed Gigabit Ethernet controllers featuring network
acceleration including IEEE 1588. v2 hardware support and
virtualization (eTSEC)
. eTSEC 1 supports RGMII/RMII
. eTSEC 2 supports RGMII
. High-speed USB 2.0 host and device controller with ULPI interface
. Enhanced secure digital (SD/MMC) host controller (eSDHC)
. Antenna interface controller (AIC), supporting three industry standard
JESD207/three custom ADI RF interfaces (two dual port and one single
port) and three MAXIM's MaxPHY serial interfaces
. ADI lanes support both full duplex FDD support and half duplex TDD
support
. Universal Subscriber Identity Module (USIM) interface that facilitates
communication to SIM cards or Eurochip pre-paid phone cards
. TDM with one TDM port
. Two DUART, four eSPI, and two I2C controllers
. Integrated Flash memory controller (IFC)
. TDM with 256 channels
. GPIO
. Sixteen 32-bit timers
The DSP portion of the SoC consists of DSP core (SC3850) and various
accelerators pertaining to DSP operations.
BSC9131RDB Overview
----------------------
BSC9131 SoC
1Gbyte DDR3 (on board DDR)
128Mbyte 2K page size NAND Flash
256 Kbit M24256 I2C EEPROM
128 Mbit SPI Flash memory
USB-ULPI
eTSEC1: Connected to RGMII PHY
eTSEC2: Connected to RGMII PHY
DUART interface: supports one UARTs up to 115200 bps for console display
Linux runs on e500v2 core and access some DSP peripherals like AIC
Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Akhil Goyal <Akhil.Goyal@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Rajan Srivastava <rajan.srivastava@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
68 lines
1.6 KiB
C
68 lines
1.6 KiB
C
/*
|
|
* BSC913xRDB Board Setup
|
|
*
|
|
* Author: Priyanka Jain <Priyanka.Jain@freescale.com>
|
|
*
|
|
* Copyright 2011-2012 Freescale Semiconductor Inc.
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify it
|
|
* under the terms of the GNU General Public License as published by the
|
|
* Free Software Foundation; either version 2 of the License, or (at your
|
|
* option) any later version.
|
|
*/
|
|
|
|
#include <linux/of_platform.h>
|
|
#include <linux/pci.h>
|
|
#include <asm/mpic.h>
|
|
#include <sysdev/fsl_soc.h>
|
|
#include <asm/udbg.h>
|
|
|
|
#include "mpc85xx.h"
|
|
|
|
void __init bsc913x_rdb_pic_init(void)
|
|
{
|
|
struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN |
|
|
MPIC_SINGLE_DEST_CPU,
|
|
0, 256, " OpenPIC ");
|
|
|
|
if (!mpic)
|
|
pr_err("bsc913x: Failed to allocate MPIC structure\n");
|
|
else
|
|
mpic_init(mpic);
|
|
}
|
|
|
|
/*
|
|
* Setup the architecture
|
|
*/
|
|
static void __init bsc913x_rdb_setup_arch(void)
|
|
{
|
|
if (ppc_md.progress)
|
|
ppc_md.progress("bsc913x_rdb_setup_arch()", 0);
|
|
|
|
pr_info("bsc913x board from Freescale Semiconductor\n");
|
|
}
|
|
|
|
machine_device_initcall(bsc9131_rdb, mpc85xx_common_publish_devices);
|
|
|
|
/*
|
|
* Called very early, device-tree isn't unflattened
|
|
*/
|
|
|
|
static int __init bsc9131_rdb_probe(void)
|
|
{
|
|
unsigned long root = of_get_flat_dt_root();
|
|
|
|
return of_flat_dt_is_compatible(root, "fsl,bsc9131rdb");
|
|
}
|
|
|
|
define_machine(bsc9131_rdb) {
|
|
.name = "BSC9131 RDB",
|
|
.probe = bsc9131_rdb_probe,
|
|
.setup_arch = bsc913x_rdb_setup_arch,
|
|
.init_IRQ = bsc913x_rdb_pic_init,
|
|
.get_irq = mpic_get_irq,
|
|
.restart = fsl_rstcr_restart,
|
|
.calibrate_decr = generic_calibrate_decr,
|
|
.progress = udbg_progress,
|
|
};
|