Zhenyu Wang 0766e2efc6 - Ice Lake's display enabling patches (Jose, Mahesh, Dhinakaran, Paulo, Manasi, Anusha, Arkadiusz) ... - Ice Lake's workarounds (Oscar and Yunwei) - Ice Lake interrupt registers fixes (Oscar) - Context switch timeline fixes and improvements (Chris) - Spelling fixes (Colin) - GPU reset fixes and improvements (Chris) - Including fixes on execlist and preemption for a proper GPU reset (Chris) - Clean-up the port pipe select bits (Ville) - Other execlist improvements (Chris) - Remove unused enable_cmd_parser parameter (Chris) - Fix order of enabling pipe/transcoder/planes on HSW+ to avoid hang on ICL (Paulo) - Simplification and changes on intel_context (Chris) - Disable LVDS on Radiant P845 (Ondrej) - Improve HSW/BDW voltage swing handling (Ville) - Cleanup and renames on few parts of intel_dp code to make code clear and less confusing (Ville) - Move acpi lid notification code for fixing LVDS (Chris) - Speed up GPU idle detection (Chris) - Make intel_engine_dump irqsafe (Chris) - Fix GVT crash (Zhenyu) - Move GEM BO inside drm_framebuffer and use intel_fb_obj everywhere (Chris) - Revert edp's alternate fixed mode (Jani) - Protect tainted function pointer lookup (Chris) - And subsequent unsigned long size fix (Chris) - Allow page directory allocation to fail (Chris) - VBT's edp and lvds fix and clean-up (Ville) - Many other reorganizations and cleanups on DDI and DP code, as well on scaler and planes (Ville) - Selftest pin the mock kernel context (Chris) - Many PSR Fixes, clean-up and improvements (Dhinakaran) - PSR VBT fix (Vathsala) - Fix i915_scheduler and intel_context declaration (Tvrtko) - Improve PCH underruns detection on ILK-IVB (Ville) - Few s/drm_priv/i915 (Chris, Michal) - Notify opregion of the sanitized encoder state (Maarten) - Guc's event handling improvements and fixes on initialization failures (Michal) - Many gtt fixes and improvements (Chris) - Fixes and improvements for Suspend and Freeze safely (Chris) - i915_gem init and fini cleanup and fixes (Michal) - Remove obsolete switch_mm for gen8+ (Chris) - hw and context id fixes for GuC (Lionel) - Add new vGPU cap info bit VGT_CAPS_HUGE_GTT (Changbin) - Make context pin/unpin symmetric (Chris) - vma: Move the bind_count vs pin_count assertion to a helper (Chris) - Use available SZ_1M instead of 1 << 20 (Chris) - Trace and PMU fixes and improvements (Tvrtko) -----BEGIN PGP SIGNATURE----- iQEcBAABAgAGBQJbGFxbAAoJEPpiX2QO6xPK618H/i+VkEGB+Qdr3h3bwhwVSWB1 TzHZKFSDxznm3rDGU9argGc/nk0af4Kbq1+jnG9FYou2bmW7+wRu9RwIiX4Dggmy FJUHTZDm4lkP3KVlTGL9IbmS9/P6Opxdw9Hyn3WwpfDK2lg9KrRy3NwBtsxaLF6w ZM8hrabsnv0p9RRbNNqb9PJmDJCyoCeyvKgQPeHxHrwiV3VLsqerbuWRAHAQ90Vz /7hPvl6EcujpQR0xeaHt2+dFP2FTVVbVwyFyU4JMc5iPEDdQGOwPmxZCK8c7Khil Uoy1iUtoE5YKrcutEfFhUDigkYIB4N6WSAVrWPxEaHYQzx3XyewZtKIxDHVHpMI= =bbkZ -----END PGP SIGNATURE----- Merge tag 'drm-intel-next-2018-06-06' into gvt-next Backmerge for recent request->hw_context change and new vGPU huge page capability definition. Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>		2018-06-07 10:24:50 +08:00
..
drm	- Ice Lake's display enabling patches (Jose, Mahesh, Dhinakaran, Paulo, Manasi, Anusha, Arkadiusz)	2018-06-07 10:24:50 +08:00
host1x
ipu-v3
vga
Makefile