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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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6a4d4b3253
This tag contains some small RISC-V updates I'd like to target for 4.18. They are all fairly small this time. Here's a short summary, there's more info in the commits/merges. * A fix to __clear_user to respect the passed arguments. * Enough support for the perf subsystem to work with RISC-V's ISA defined performance counters. * Support for sparse and cleanups suggested by it. * Support for R_RISCV_32 (a relocation, not the 32-bit ISA). * Some MAINTAINERS cleanups. * The addition of CONFIG_HVC_RISCV_SBI to our defconfig, as it's always present. I've given these a simple build+boot test. -----BEGIN PGP SIGNATURE----- iQJHBAABCAAxFiEEAM520YNJYN/OiG3470yhUCzLq0EFAlsezeQTHHBhbG1lckBk YWJiZWx0LmNvbQAKCRDvTKFQLMurQSjWD/999J5HKkHQfHJi4/RQh0SEFNnRv32U 1O7zwqA5PkeoxWqq1y+dKcPGwZTZncwWp8yn8xipVYTYmYgGNZj9CYdEYkO119y5 OVcyUZdHlSdXgKkpVDJ0+MrZ60LY6tS66b6oJqQKmB/N4rYvu5L6ctRtyHRQe4nb rXNVbnaouiwrFJs9iZaCyaaGAGXKg81C5xCvvr8P0CYzVD4Jx+AmD6c7GohGWJS3 PLttEsmPaiaV9pzWK18yeFLaIgAqNEo2/s7/QsR1sHo4dUEJyFu9nMHvmjlJucCu imrkRwlhsCKxa4ob9D6UPh0qBXDmbSQA1U6M9RKY1jdt7Gul5eMuZIz2r/45752D z3YCITgTih2dzWO0zw4GCicCcJoD39IVTrsRCIqxF7jmAfBV8s/U+irMjEMkYhz6 wKVM9L3/6Z4bPAEztqKMjSw1/nNSavyn6wWACYIj5SDtFqNkvxwSahg1nGTuuoNx JqRa0r+lxsbunSwpEVtRROLYE3ZYa/KPrKhKEr+7vkiPlNNv82TZ5T/wkObhVfKp S6tZ0/Wb0tchm//LurfLAOV4aZxDlOLfukZ3eSdgBqSfILA3T98zS9FpuCmjiUfG 6S5GdNvjc3jLLZvPwtofIZmKUSpRSj545J1RRkEcgoEFjXdzxOWFLETsIOIt4nFf 7Nwjw/Th1hzuyQ== =D+sb -----END PGP SIGNATURE----- Merge tag 'riscv-for-linus-4.18-merge_window' of git://git.kernel.org/pub/scm/linux/kernel/git/palmer/riscv-linux Pull RISC-V updates from Palmer Dabbelt: "This contains some small RISC-V updates I'd like to target for 4.18. They are all fairly small this time. Here's a short summary, there's more info in the commits/merges: - a fix to __clear_user to respect the passed arguments. - enough support for the perf subsystem to work with RISC-V's ISA defined performance counters. - support for sparse and cleanups suggested by it. - support for R_RISCV_32 (a relocation, not the 32-bit ISA). - some MAINTAINERS cleanups. - the addition of CONFIG_HVC_RISCV_SBI to our defconfig, as it's always present. I've given these a simple build+boot test" * tag 'riscv-for-linus-4.18-merge_window' of git://git.kernel.org/pub/scm/linux/kernel/git/palmer/riscv-linux: RISC-V: Add CONFIG_HVC_RISCV_SBI=y to defconfig RISC-V: Handle R_RISCV_32 in modules riscv/ftrace: Export _mcount when DYNAMIC_FTRACE isn't set riscv: add riscv-specific predefines to CHECKFLAGS riscv: split the declaration of __copy_user riscv: no __user for probe_kernel_address() riscv: use NULL instead of a plain 0 perf: riscv: Add Document for Future Porting Guide perf: riscv: preliminary RISC-V support MAINTAINERS: Update Albert's email, he's back at Berkeley MAINTAINERS: Add myself as a maintainer for SiFive's drivers riscv: Fix the bug in memory access fixup code
169 lines
4.4 KiB
C
169 lines
4.4 KiB
C
/*
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* Copyright (C) 2012 Regents of the University of California
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation, version 2.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/sched.h>
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#include <linux/sched/debug.h>
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#include <linux/sched/signal.h>
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#include <linux/signal.h>
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#include <linux/kdebug.h>
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#include <linux/uaccess.h>
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#include <linux/mm.h>
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#include <linux/module.h>
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#include <linux/irq.h>
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#include <asm/processor.h>
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#include <asm/ptrace.h>
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#include <asm/csr.h>
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int show_unhandled_signals = 1;
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extern asmlinkage void handle_exception(void);
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static DEFINE_SPINLOCK(die_lock);
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void die(struct pt_regs *regs, const char *str)
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{
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static int die_counter;
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int ret;
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oops_enter();
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spin_lock_irq(&die_lock);
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console_verbose();
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bust_spinlocks(1);
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pr_emerg("%s [#%d]\n", str, ++die_counter);
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print_modules();
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show_regs(regs);
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ret = notify_die(DIE_OOPS, str, regs, 0, regs->scause, SIGSEGV);
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bust_spinlocks(0);
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add_taint(TAINT_DIE, LOCKDEP_NOW_UNRELIABLE);
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spin_unlock_irq(&die_lock);
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oops_exit();
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if (in_interrupt())
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panic("Fatal exception in interrupt");
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if (panic_on_oops)
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panic("Fatal exception");
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if (ret != NOTIFY_STOP)
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do_exit(SIGSEGV);
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}
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void do_trap(struct pt_regs *regs, int signo, int code,
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unsigned long addr, struct task_struct *tsk)
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{
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if (show_unhandled_signals && unhandled_signal(tsk, signo)
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&& printk_ratelimit()) {
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pr_info("%s[%d]: unhandled signal %d code 0x%x at 0x" REG_FMT,
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tsk->comm, task_pid_nr(tsk), signo, code, addr);
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print_vma_addr(KERN_CONT " in ", GET_IP(regs));
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pr_cont("\n");
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show_regs(regs);
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}
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force_sig_fault(signo, code, (void __user *)addr, tsk);
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}
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static void do_trap_error(struct pt_regs *regs, int signo, int code,
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unsigned long addr, const char *str)
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{
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if (user_mode(regs)) {
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do_trap(regs, signo, code, addr, current);
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} else {
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if (!fixup_exception(regs))
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die(regs, str);
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}
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}
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#define DO_ERROR_INFO(name, signo, code, str) \
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asmlinkage void name(struct pt_regs *regs) \
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{ \
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do_trap_error(regs, signo, code, regs->sepc, "Oops - " str); \
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}
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DO_ERROR_INFO(do_trap_unknown,
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SIGILL, ILL_ILLTRP, "unknown exception");
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DO_ERROR_INFO(do_trap_insn_misaligned,
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SIGBUS, BUS_ADRALN, "instruction address misaligned");
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DO_ERROR_INFO(do_trap_insn_fault,
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SIGSEGV, SEGV_ACCERR, "instruction access fault");
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DO_ERROR_INFO(do_trap_insn_illegal,
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SIGILL, ILL_ILLOPC, "illegal instruction");
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DO_ERROR_INFO(do_trap_load_misaligned,
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SIGBUS, BUS_ADRALN, "load address misaligned");
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DO_ERROR_INFO(do_trap_load_fault,
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SIGSEGV, SEGV_ACCERR, "load access fault");
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DO_ERROR_INFO(do_trap_store_misaligned,
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SIGBUS, BUS_ADRALN, "store (or AMO) address misaligned");
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DO_ERROR_INFO(do_trap_store_fault,
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SIGSEGV, SEGV_ACCERR, "store (or AMO) access fault");
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DO_ERROR_INFO(do_trap_ecall_u,
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SIGILL, ILL_ILLTRP, "environment call from U-mode");
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DO_ERROR_INFO(do_trap_ecall_s,
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SIGILL, ILL_ILLTRP, "environment call from S-mode");
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DO_ERROR_INFO(do_trap_ecall_m,
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SIGILL, ILL_ILLTRP, "environment call from M-mode");
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asmlinkage void do_trap_break(struct pt_regs *regs)
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{
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#ifdef CONFIG_GENERIC_BUG
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if (!user_mode(regs)) {
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enum bug_trap_type type;
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type = report_bug(regs->sepc, regs);
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switch (type) {
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case BUG_TRAP_TYPE_NONE:
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break;
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case BUG_TRAP_TYPE_WARN:
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regs->sepc += sizeof(bug_insn_t);
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return;
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case BUG_TRAP_TYPE_BUG:
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die(regs, "Kernel BUG");
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}
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}
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#endif /* CONFIG_GENERIC_BUG */
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force_sig_fault(SIGTRAP, TRAP_BRKPT, (void __user *)(regs->sepc), current);
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regs->sepc += 0x4;
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}
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#ifdef CONFIG_GENERIC_BUG
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int is_valid_bugaddr(unsigned long pc)
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{
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bug_insn_t insn;
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if (pc < PAGE_OFFSET)
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return 0;
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if (probe_kernel_address((bug_insn_t *)pc, insn))
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return 0;
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return (insn == __BUG_INSN);
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}
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#endif /* CONFIG_GENERIC_BUG */
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void __init trap_init(void)
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{
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/*
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* Set sup0 scratch register to 0, indicating to exception vector
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* that we are presently executing in the kernel
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*/
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csr_write(sscratch, 0);
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/* Set the exception vector address */
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csr_write(stvec, &handle_exception);
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/* Enable all interrupts */
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csr_write(sie, -1);
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}
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