mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-16 21:57:31 +07:00
f43c00c04b
If two listeners are created with different IP's but same port, the second rdma_listen fails due to a duplicate port entry being added from the CQP add APBVT OP. commitf16dc0aa5e
("i40iw: Add support for port reuse on active side connections") does not account for listener side port reuse. Check for duplicate port before invoking the CQP command to add APBVT entry and delete the entry only if the port is not in use. Additionally, consolidate all port-reuse logic into i40iw_manage_apbvt. Fixes:f16dc0aa5e
("i40iw: Add support for port reuse on active side connections") Signed-off-by: Shiraz Saleem <shiraz.saleem@intel.com> Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
463 lines
11 KiB
C
463 lines
11 KiB
C
/*******************************************************************************
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*
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* Copyright (c) 2015-2016 Intel Corporation. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenFabrics.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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*******************************************************************************/
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#ifndef I40IW_CM_H
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#define I40IW_CM_H
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#define QUEUE_EVENTS
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#define I40IW_MANAGE_APBVT_DEL 0
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#define I40IW_MANAGE_APBVT_ADD 1
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#define I40IW_MPA_REQUEST_ACCEPT 1
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#define I40IW_MPA_REQUEST_REJECT 2
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/* IETF MPA -- defines, enums, structs */
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#define IEFT_MPA_KEY_REQ "MPA ID Req Frame"
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#define IEFT_MPA_KEY_REP "MPA ID Rep Frame"
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#define IETF_MPA_KEY_SIZE 16
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#define IETF_MPA_VERSION 1
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#define IETF_MAX_PRIV_DATA_LEN 512
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#define IETF_MPA_FRAME_SIZE 20
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#define IETF_RTR_MSG_SIZE 4
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#define IETF_MPA_V2_FLAG 0x10
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#define SNDMARKER_SEQNMASK 0x000001FF
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#define I40IW_MAX_IETF_SIZE 32
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/* IETF RTR MSG Fields */
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#define IETF_PEER_TO_PEER 0x8000
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#define IETF_FLPDU_ZERO_LEN 0x4000
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#define IETF_RDMA0_WRITE 0x8000
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#define IETF_RDMA0_READ 0x4000
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#define IETF_NO_IRD_ORD 0x3FFF
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/* HW-supported IRD sizes*/
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#define I40IW_HW_IRD_SETTING_2 2
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#define I40IW_HW_IRD_SETTING_4 4
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#define I40IW_HW_IRD_SETTING_8 8
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#define I40IW_HW_IRD_SETTING_16 16
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#define I40IW_HW_IRD_SETTING_32 32
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#define I40IW_HW_IRD_SETTING_64 64
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#define MAX_PORTS 65536
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#define I40IW_VLAN_PRIO_SHIFT 13
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enum ietf_mpa_flags {
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IETF_MPA_FLAGS_MARKERS = 0x80, /* receive Markers */
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IETF_MPA_FLAGS_CRC = 0x40, /* receive Markers */
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IETF_MPA_FLAGS_REJECT = 0x20, /* Reject */
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};
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struct ietf_mpa_v1 {
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u8 key[IETF_MPA_KEY_SIZE];
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u8 flags;
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u8 rev;
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__be16 priv_data_len;
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u8 priv_data[0];
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};
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#define ietf_mpa_req_resp_frame ietf_mpa_frame
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struct ietf_rtr_msg {
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__be16 ctrl_ird;
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__be16 ctrl_ord;
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};
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struct ietf_mpa_v2 {
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u8 key[IETF_MPA_KEY_SIZE];
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u8 flags;
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u8 rev;
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__be16 priv_data_len;
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struct ietf_rtr_msg rtr_msg;
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u8 priv_data[0];
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};
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struct i40iw_cm_node;
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enum i40iw_timer_type {
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I40IW_TIMER_TYPE_SEND,
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I40IW_TIMER_TYPE_RECV,
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I40IW_TIMER_NODE_CLEANUP,
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I40IW_TIMER_TYPE_CLOSE,
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};
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#define I40IW_PASSIVE_STATE_INDICATED 0
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#define I40IW_DO_NOT_SEND_RESET_EVENT 1
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#define I40IW_SEND_RESET_EVENT 2
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#define MAX_I40IW_IFS 4
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#define SET_ACK 0x1
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#define SET_SYN 0x2
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#define SET_FIN 0x4
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#define SET_RST 0x8
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#define TCP_OPTIONS_PADDING 3
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struct option_base {
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u8 optionnum;
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u8 length;
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};
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enum option_numbers {
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OPTION_NUMBER_END,
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OPTION_NUMBER_NONE,
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OPTION_NUMBER_MSS,
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OPTION_NUMBER_WINDOW_SCALE,
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OPTION_NUMBER_SACK_PERM,
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OPTION_NUMBER_SACK,
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OPTION_NUMBER_WRITE0 = 0xbc
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};
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struct option_mss {
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u8 optionnum;
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u8 length;
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__be16 mss;
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};
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struct option_windowscale {
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u8 optionnum;
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u8 length;
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u8 shiftcount;
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};
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union all_known_options {
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char as_end;
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struct option_base as_base;
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struct option_mss as_mss;
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struct option_windowscale as_windowscale;
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};
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struct i40iw_timer_entry {
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struct list_head list;
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unsigned long timetosend; /* jiffies */
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struct i40iw_puda_buf *sqbuf;
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u32 type;
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u32 retrycount;
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u32 retranscount;
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u32 context;
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u32 send_retrans;
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int close_when_complete;
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};
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#define I40IW_DEFAULT_RETRYS 64
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#define I40IW_DEFAULT_RETRANS 8
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#define I40IW_DEFAULT_TTL 0x40
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#define I40IW_DEFAULT_RTT_VAR 0x6
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#define I40IW_DEFAULT_SS_THRESH 0x3FFFFFFF
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#define I40IW_DEFAULT_REXMIT_THRESH 8
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#define I40IW_RETRY_TIMEOUT HZ
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#define I40IW_SHORT_TIME 10
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#define I40IW_LONG_TIME (2 * HZ)
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#define I40IW_MAX_TIMEOUT ((unsigned long)(12 * HZ))
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#define I40IW_CM_HASHTABLE_SIZE 1024
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#define I40IW_CM_TCP_TIMER_INTERVAL 3000
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#define I40IW_CM_DEFAULT_MTU 1540
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#define I40IW_CM_DEFAULT_FRAME_CNT 10
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#define I40IW_CM_THREAD_STACK_SIZE 256
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#define I40IW_CM_DEFAULT_RCV_WND 64240
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#define I40IW_CM_DEFAULT_RCV_WND_SCALED 0x3fffc
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#define I40IW_CM_DEFAULT_RCV_WND_SCALE 2
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#define I40IW_CM_DEFAULT_FREE_PKTS 0x000A
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#define I40IW_CM_FREE_PKT_LO_WATERMARK 2
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#define I40IW_CM_DEFAULT_MSS 536
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#define I40IW_CM_DEF_SEQ 0x159bf75f
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#define I40IW_CM_DEF_LOCAL_ID 0x3b47
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#define I40IW_CM_DEF_SEQ2 0x18ed5740
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#define I40IW_CM_DEF_LOCAL_ID2 0xb807
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#define MAX_CM_BUFFER (I40IW_MAX_IETF_SIZE + IETF_MAX_PRIV_DATA_LEN)
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typedef u32 i40iw_addr_t;
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#define i40iw_cm_tsa_context i40iw_qp_context
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struct i40iw_qp;
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/* cm node transition states */
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enum i40iw_cm_node_state {
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I40IW_CM_STATE_UNKNOWN,
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I40IW_CM_STATE_INITED,
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I40IW_CM_STATE_LISTENING,
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I40IW_CM_STATE_SYN_RCVD,
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I40IW_CM_STATE_SYN_SENT,
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I40IW_CM_STATE_ONE_SIDE_ESTABLISHED,
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I40IW_CM_STATE_ESTABLISHED,
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I40IW_CM_STATE_ACCEPTING,
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I40IW_CM_STATE_MPAREQ_SENT,
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I40IW_CM_STATE_MPAREQ_RCVD,
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I40IW_CM_STATE_MPAREJ_RCVD,
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I40IW_CM_STATE_OFFLOADED,
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I40IW_CM_STATE_FIN_WAIT1,
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I40IW_CM_STATE_FIN_WAIT2,
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I40IW_CM_STATE_CLOSE_WAIT,
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I40IW_CM_STATE_TIME_WAIT,
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I40IW_CM_STATE_LAST_ACK,
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I40IW_CM_STATE_CLOSING,
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I40IW_CM_STATE_LISTENER_DESTROYED,
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I40IW_CM_STATE_CLOSED
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};
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enum mpa_frame_version {
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IETF_MPA_V1 = 1,
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IETF_MPA_V2 = 2
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};
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enum mpa_frame_key {
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MPA_KEY_REQUEST,
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MPA_KEY_REPLY
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};
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enum send_rdma0 {
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SEND_RDMA_READ_ZERO = 1,
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SEND_RDMA_WRITE_ZERO = 2
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};
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enum i40iw_tcpip_pkt_type {
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I40IW_PKT_TYPE_UNKNOWN,
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I40IW_PKT_TYPE_SYN,
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I40IW_PKT_TYPE_SYNACK,
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I40IW_PKT_TYPE_ACK,
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I40IW_PKT_TYPE_FIN,
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I40IW_PKT_TYPE_RST
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};
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/* CM context params */
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struct i40iw_cm_tcp_context {
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u8 client;
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u32 loc_seq_num;
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u32 loc_ack_num;
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u32 rem_ack_num;
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u32 rcv_nxt;
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u32 loc_id;
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u32 rem_id;
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u32 snd_wnd;
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u32 max_snd_wnd;
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u32 rcv_wnd;
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u32 mss;
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u8 snd_wscale;
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u8 rcv_wscale;
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};
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enum i40iw_cm_listener_state {
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I40IW_CM_LISTENER_PASSIVE_STATE = 1,
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I40IW_CM_LISTENER_ACTIVE_STATE = 2,
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I40IW_CM_LISTENER_EITHER_STATE = 3
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};
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struct i40iw_cm_listener {
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struct list_head list;
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struct i40iw_cm_core *cm_core;
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u8 loc_mac[ETH_ALEN];
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u32 loc_addr[4];
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u16 loc_port;
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struct iw_cm_id *cm_id;
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atomic_t ref_count;
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struct i40iw_device *iwdev;
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atomic_t pend_accepts_cnt;
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int backlog;
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enum i40iw_cm_listener_state listener_state;
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u32 reused_node;
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u8 user_pri;
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u8 tos;
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u16 vlan_id;
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bool qhash_set;
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bool ipv4;
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struct list_head child_listen_list;
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};
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struct i40iw_kmem_info {
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void *addr;
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u32 size;
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};
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/* per connection node and node state information */
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struct i40iw_cm_node {
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u32 loc_addr[4], rem_addr[4];
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u16 loc_port, rem_port;
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u16 vlan_id;
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enum i40iw_cm_node_state state;
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u8 loc_mac[ETH_ALEN];
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u8 rem_mac[ETH_ALEN];
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atomic_t ref_count;
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struct i40iw_qp *iwqp;
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struct i40iw_device *iwdev;
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struct i40iw_sc_dev *dev;
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struct i40iw_cm_tcp_context tcp_cntxt;
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struct i40iw_cm_core *cm_core;
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struct i40iw_cm_node *loopbackpartner;
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struct i40iw_timer_entry *send_entry;
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struct i40iw_timer_entry *close_entry;
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spinlock_t retrans_list_lock; /* cm transmit packet */
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enum send_rdma0 send_rdma0_op;
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u16 ird_size;
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u16 ord_size;
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u16 mpav2_ird_ord;
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struct iw_cm_id *cm_id;
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struct list_head list;
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bool accelerated;
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struct i40iw_cm_listener *listener;
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int apbvt_set;
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int accept_pend;
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struct list_head timer_entry;
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struct list_head reset_entry;
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struct list_head teardown_entry;
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atomic_t passive_state;
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bool qhash_set;
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u8 user_pri;
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u8 tos;
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bool ipv4;
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bool snd_mark_en;
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u16 lsmm_size;
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enum mpa_frame_version mpa_frame_rev;
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struct i40iw_kmem_info pdata;
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union {
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struct ietf_mpa_v1 mpa_frame;
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struct ietf_mpa_v2 mpa_v2_frame;
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};
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u8 pdata_buf[IETF_MAX_PRIV_DATA_LEN];
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struct i40iw_kmem_info mpa_hdr;
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bool ack_rcvd;
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};
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/* structure for client or CM to fill when making CM api calls. */
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/* - only need to set relevant data, based on op. */
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struct i40iw_cm_info {
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struct iw_cm_id *cm_id;
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u16 loc_port;
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u16 rem_port;
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u32 loc_addr[4];
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u32 rem_addr[4];
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u16 vlan_id;
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int backlog;
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u8 user_pri;
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u8 tos;
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bool ipv4;
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};
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/* CM event codes */
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enum i40iw_cm_event_type {
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I40IW_CM_EVENT_UNKNOWN,
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I40IW_CM_EVENT_ESTABLISHED,
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I40IW_CM_EVENT_MPA_REQ,
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I40IW_CM_EVENT_MPA_CONNECT,
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I40IW_CM_EVENT_MPA_ACCEPT,
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I40IW_CM_EVENT_MPA_REJECT,
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I40IW_CM_EVENT_MPA_ESTABLISHED,
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I40IW_CM_EVENT_CONNECTED,
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I40IW_CM_EVENT_RESET,
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I40IW_CM_EVENT_ABORTED
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};
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/* event to post to CM event handler */
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struct i40iw_cm_event {
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enum i40iw_cm_event_type type;
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struct i40iw_cm_info cm_info;
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struct work_struct event_work;
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struct i40iw_cm_node *cm_node;
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};
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struct i40iw_cm_core {
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struct i40iw_device *iwdev;
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struct i40iw_sc_dev *dev;
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struct list_head listen_nodes;
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struct list_head accelerated_list;
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struct list_head non_accelerated_list;
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struct timer_list tcp_timer;
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struct workqueue_struct *event_wq;
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struct workqueue_struct *disconn_wq;
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spinlock_t ht_lock; /* manage hash table */
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spinlock_t listen_list_lock; /* listen list */
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spinlock_t apbvt_lock; /*manage apbvt entries*/
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unsigned long ports_in_use[BITS_TO_LONGS(MAX_PORTS)];
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u64 stats_nodes_created;
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u64 stats_nodes_destroyed;
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u64 stats_listen_created;
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u64 stats_listen_destroyed;
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u64 stats_listen_nodes_created;
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u64 stats_listen_nodes_destroyed;
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u64 stats_loopbacks;
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u64 stats_accepts;
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u64 stats_rejects;
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u64 stats_connect_errs;
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u64 stats_passive_errs;
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u64 stats_pkt_retrans;
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u64 stats_backlog_drops;
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};
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int i40iw_schedule_cm_timer(struct i40iw_cm_node *cm_node,
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struct i40iw_puda_buf *sqbuf,
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enum i40iw_timer_type type,
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int send_retrans,
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int close_when_complete);
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int i40iw_accept(struct iw_cm_id *, struct iw_cm_conn_param *);
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int i40iw_reject(struct iw_cm_id *, const void *, u8);
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int i40iw_connect(struct iw_cm_id *, struct iw_cm_conn_param *);
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int i40iw_create_listen(struct iw_cm_id *, int);
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int i40iw_destroy_listen(struct iw_cm_id *);
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int i40iw_cm_start(struct i40iw_device *);
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int i40iw_cm_stop(struct i40iw_device *);
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int i40iw_arp_table(struct i40iw_device *iwdev,
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u32 *ip_addr,
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bool ipv4,
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u8 *mac_addr,
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u32 action);
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void i40iw_if_notify(struct i40iw_device *iwdev, struct net_device *netdev,
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u32 *ipaddr, bool ipv4, bool ifup);
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void i40iw_cm_teardown_connections(struct i40iw_device *iwdev, u32 *ipaddr,
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struct i40iw_cm_info *nfo,
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bool disconnect_all);
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bool i40iw_port_in_use(struct i40iw_cm_core *cm_core, u16 port);
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#endif /* I40IW_CM_H */
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