mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-13 19:26:45 +07:00
0744a3ee37
Get rid of the mdesc pointer in the fixup function call. No one uses the mdesc pointer, it shouldn't be modified anyway, and we can't wrap it, so let's remove it. Platform files found by: $ regexp=$(git grep -h '\.fixup.*=' arch/arm | sed 's!.*= *\([^,]*\),* *!\1!' | sort -u | tr '\n' '|' | sed 's,|$,,;s,|,\\|,g') $ git grep $regexp arch/arm Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
536 lines
13 KiB
C
536 lines
13 KiB
C
/*
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* linux/arch/arm/mach-realview/core.c
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*
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* Copyright (C) 1999 - 2003 ARM Limited
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* Copyright (C) 2000 Deep Blue Solutions Ltd
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/dma-mapping.h>
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#include <linux/sysdev.h>
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#include <linux/interrupt.h>
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#include <linux/amba/bus.h>
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#include <linux/amba/clcd.h>
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#include <linux/io.h>
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#include <linux/smsc911x.h>
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#include <linux/ata_platform.h>
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#include <linux/amba/mmci.h>
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#include <linux/gfp.h>
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#include <linux/clkdev.h>
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#include <linux/mtd/physmap.h>
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#include <asm/system.h>
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#include <mach/hardware.h>
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#include <asm/irq.h>
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#include <asm/leds.h>
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#include <asm/mach-types.h>
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#include <asm/hardware/arm_timer.h>
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#include <asm/hardware/icst.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/irq.h>
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#include <asm/mach/map.h>
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#include <asm/hardware/gic.h>
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#include <mach/platform.h>
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#include <mach/irqs.h>
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#include <asm/hardware/timer-sp.h>
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#include <plat/clcd.h>
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#include <plat/sched_clock.h>
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#include "core.h"
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#define REALVIEW_FLASHCTRL (__io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_FLASH_OFFSET)
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static void realview_flash_set_vpp(struct platform_device *pdev, int on)
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{
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u32 val;
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val = __raw_readl(REALVIEW_FLASHCTRL);
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if (on)
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val |= REALVIEW_FLASHPROG_FLVPPEN;
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else
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val &= ~REALVIEW_FLASHPROG_FLVPPEN;
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__raw_writel(val, REALVIEW_FLASHCTRL);
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}
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static struct physmap_flash_data realview_flash_data = {
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.width = 4,
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.set_vpp = realview_flash_set_vpp,
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};
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struct platform_device realview_flash_device = {
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.name = "physmap-flash",
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.id = 0,
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.dev = {
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.platform_data = &realview_flash_data,
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},
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};
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int realview_flash_register(struct resource *res, u32 num)
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{
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realview_flash_device.resource = res;
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realview_flash_device.num_resources = num;
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return platform_device_register(&realview_flash_device);
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}
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static struct smsc911x_platform_config smsc911x_config = {
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.flags = SMSC911X_USE_32BIT,
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.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
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.irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
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.phy_interface = PHY_INTERFACE_MODE_MII,
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};
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static struct platform_device realview_eth_device = {
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.name = "smsc911x",
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.id = 0,
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.num_resources = 2,
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};
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int realview_eth_register(const char *name, struct resource *res)
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{
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if (name)
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realview_eth_device.name = name;
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realview_eth_device.resource = res;
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if (strcmp(realview_eth_device.name, "smsc911x") == 0)
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realview_eth_device.dev.platform_data = &smsc911x_config;
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return platform_device_register(&realview_eth_device);
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}
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struct platform_device realview_usb_device = {
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.name = "isp1760",
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.num_resources = 2,
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};
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int realview_usb_register(struct resource *res)
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{
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realview_usb_device.resource = res;
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return platform_device_register(&realview_usb_device);
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}
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static struct pata_platform_info pata_platform_data = {
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.ioport_shift = 1,
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};
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static struct resource pata_resources[] = {
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[0] = {
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.start = REALVIEW_CF_BASE,
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.end = REALVIEW_CF_BASE + 0xff,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = REALVIEW_CF_BASE + 0x100,
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.end = REALVIEW_CF_BASE + SZ_4K - 1,
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.flags = IORESOURCE_MEM,
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},
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};
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struct platform_device realview_cf_device = {
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.name = "pata_platform",
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.id = -1,
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.num_resources = ARRAY_SIZE(pata_resources),
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.resource = pata_resources,
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.dev = {
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.platform_data = &pata_platform_data,
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},
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};
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static struct resource realview_i2c_resource = {
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.start = REALVIEW_I2C_BASE,
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.end = REALVIEW_I2C_BASE + SZ_4K - 1,
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.flags = IORESOURCE_MEM,
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};
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struct platform_device realview_i2c_device = {
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.name = "versatile-i2c",
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.id = 0,
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.num_resources = 1,
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.resource = &realview_i2c_resource,
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};
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static struct i2c_board_info realview_i2c_board_info[] = {
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{
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I2C_BOARD_INFO("ds1338", 0xd0 >> 1),
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},
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};
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static int __init realview_i2c_init(void)
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{
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return i2c_register_board_info(0, realview_i2c_board_info,
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ARRAY_SIZE(realview_i2c_board_info));
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}
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arch_initcall(realview_i2c_init);
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#define REALVIEW_SYSMCI (__io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_MCI_OFFSET)
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/*
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* This is only used if GPIOLIB support is disabled
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*/
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static unsigned int realview_mmc_status(struct device *dev)
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{
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struct amba_device *adev = container_of(dev, struct amba_device, dev);
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u32 mask;
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if (machine_is_realview_pb1176()) {
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static bool inserted = false;
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/*
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* The PB1176 does not have the status register,
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* assume it is inserted at startup, then invert
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* for each call so card insertion/removal will
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* be detected anyway. This will not be called if
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* GPIO on PL061 is active, which is the proper
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* way to do this on the PB1176.
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*/
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inserted = !inserted;
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return inserted ? 0 : 1;
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}
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if (adev->res.start == REALVIEW_MMCI0_BASE)
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mask = 1;
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else
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mask = 2;
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return readl(REALVIEW_SYSMCI) & mask;
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}
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struct mmci_platform_data realview_mmc0_plat_data = {
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.ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
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.status = realview_mmc_status,
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.gpio_wp = 17,
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.gpio_cd = 16,
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.cd_invert = true,
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};
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struct mmci_platform_data realview_mmc1_plat_data = {
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.ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
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.status = realview_mmc_status,
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.gpio_wp = 19,
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.gpio_cd = 18,
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.cd_invert = true,
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};
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/*
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* Clock handling
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*/
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static const struct icst_params realview_oscvco_params = {
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.ref = 24000000,
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.vco_max = ICST307_VCO_MAX,
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.vco_min = ICST307_VCO_MIN,
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.vd_min = 4 + 8,
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.vd_max = 511 + 8,
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.rd_min = 1 + 2,
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.rd_max = 127 + 2,
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.s2div = icst307_s2div,
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.idx2s = icst307_idx2s,
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};
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static void realview_oscvco_set(struct clk *clk, struct icst_vco vco)
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{
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void __iomem *sys_lock = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_LOCK_OFFSET;
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u32 val;
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val = readl(clk->vcoreg) & ~0x7ffff;
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val |= vco.v | (vco.r << 9) | (vco.s << 16);
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writel(0xa05f, sys_lock);
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writel(val, clk->vcoreg);
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writel(0, sys_lock);
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}
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static const struct clk_ops oscvco_clk_ops = {
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.round = icst_clk_round,
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.set = icst_clk_set,
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.setvco = realview_oscvco_set,
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};
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static struct clk oscvco_clk = {
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.ops = &oscvco_clk_ops,
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.params = &realview_oscvco_params,
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};
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/*
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* These are fixed clocks.
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*/
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static struct clk ref24_clk = {
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.rate = 24000000,
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};
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static struct clk sp804_clk = {
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.rate = 1000000,
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};
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static struct clk dummy_apb_pclk;
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static struct clk_lookup lookups[] = {
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{ /* Bus clock */
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.con_id = "apb_pclk",
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.clk = &dummy_apb_pclk,
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}, { /* UART0 */
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.dev_id = "dev:uart0",
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.clk = &ref24_clk,
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}, { /* UART1 */
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.dev_id = "dev:uart1",
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.clk = &ref24_clk,
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}, { /* UART2 */
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.dev_id = "dev:uart2",
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.clk = &ref24_clk,
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}, { /* UART3 */
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.dev_id = "fpga:uart3",
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.clk = &ref24_clk,
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}, { /* UART3 is on the dev chip in PB1176 */
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.dev_id = "dev:uart3",
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.clk = &ref24_clk,
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}, { /* UART4 only exists in PB1176 */
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.dev_id = "fpga:uart4",
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.clk = &ref24_clk,
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}, { /* KMI0 */
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.dev_id = "fpga:kmi0",
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.clk = &ref24_clk,
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}, { /* KMI1 */
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.dev_id = "fpga:kmi1",
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.clk = &ref24_clk,
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}, { /* MMC0 */
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.dev_id = "fpga:mmc0",
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.clk = &ref24_clk,
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}, { /* CLCD is in the PB1176 and EB DevChip */
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.dev_id = "dev:clcd",
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.clk = &oscvco_clk,
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}, { /* PB:CLCD */
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.dev_id = "issp:clcd",
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.clk = &oscvco_clk,
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}, { /* SSP */
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.dev_id = "dev:ssp0",
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.clk = &ref24_clk,
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}, { /* SP804 timers */
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.dev_id = "sp804",
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.clk = &sp804_clk,
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},
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};
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void __init realview_init_early(void)
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{
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void __iomem *sys = __io_address(REALVIEW_SYS_BASE);
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if (machine_is_realview_pb1176())
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oscvco_clk.vcoreg = sys + REALVIEW_SYS_OSC0_OFFSET;
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else
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oscvco_clk.vcoreg = sys + REALVIEW_SYS_OSC4_OFFSET;
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clkdev_add_table(lookups, ARRAY_SIZE(lookups));
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versatile_sched_clock_init(sys + REALVIEW_SYS_24MHz_OFFSET, 24000000);
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}
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/*
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* CLCD support.
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*/
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#define SYS_CLCD_NLCDIOON (1 << 2)
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#define SYS_CLCD_VDDPOSSWITCH (1 << 3)
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#define SYS_CLCD_PWR3V5SWITCH (1 << 4)
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#define SYS_CLCD_ID_MASK (0x1f << 8)
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#define SYS_CLCD_ID_SANYO_3_8 (0x00 << 8)
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#define SYS_CLCD_ID_UNKNOWN_8_4 (0x01 << 8)
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#define SYS_CLCD_ID_EPSON_2_2 (0x02 << 8)
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#define SYS_CLCD_ID_SANYO_2_5 (0x07 << 8)
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#define SYS_CLCD_ID_VGA (0x1f << 8)
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/*
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* Disable all display connectors on the interface module.
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*/
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static void realview_clcd_disable(struct clcd_fb *fb)
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{
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void __iomem *sys_clcd = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_CLCD_OFFSET;
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u32 val;
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val = readl(sys_clcd);
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val &= ~SYS_CLCD_NLCDIOON | SYS_CLCD_PWR3V5SWITCH;
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writel(val, sys_clcd);
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}
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/*
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* Enable the relevant connector on the interface module.
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*/
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static void realview_clcd_enable(struct clcd_fb *fb)
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{
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void __iomem *sys_clcd = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_CLCD_OFFSET;
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u32 val;
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/*
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* Enable the PSUs
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*/
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val = readl(sys_clcd);
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val |= SYS_CLCD_NLCDIOON | SYS_CLCD_PWR3V5SWITCH;
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writel(val, sys_clcd);
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}
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/*
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* Detect which LCD panel is connected, and return the appropriate
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* clcd_panel structure. Note: we do not have any information on
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* the required timings for the 8.4in panel, so we presently assume
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* VGA timings.
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*/
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static int realview_clcd_setup(struct clcd_fb *fb)
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{
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void __iomem *sys_clcd = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_CLCD_OFFSET;
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const char *panel_name, *vga_panel_name;
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unsigned long framesize;
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u32 val;
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if (machine_is_realview_eb()) {
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/* VGA, 16bpp */
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framesize = 640 * 480 * 2;
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vga_panel_name = "VGA";
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} else {
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/* XVGA, 16bpp */
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framesize = 1024 * 768 * 2;
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vga_panel_name = "XVGA";
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}
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val = readl(sys_clcd) & SYS_CLCD_ID_MASK;
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if (val == SYS_CLCD_ID_SANYO_3_8)
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panel_name = "Sanyo TM38QV67A02A";
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else if (val == SYS_CLCD_ID_SANYO_2_5)
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panel_name = "Sanyo QVGA Portrait";
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else if (val == SYS_CLCD_ID_EPSON_2_2)
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panel_name = "Epson L2F50113T00";
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else if (val == SYS_CLCD_ID_VGA)
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panel_name = vga_panel_name;
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else {
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pr_err("CLCD: unknown LCD panel ID 0x%08x, using VGA\n", val);
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panel_name = vga_panel_name;
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}
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fb->panel = versatile_clcd_get_panel(panel_name);
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if (!fb->panel)
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return -EINVAL;
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return versatile_clcd_setup_dma(fb, framesize);
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}
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struct clcd_board clcd_plat_data = {
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.name = "RealView",
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.caps = CLCD_CAP_ALL,
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.check = clcdfb_check,
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.decode = clcdfb_decode,
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.disable = realview_clcd_disable,
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.enable = realview_clcd_enable,
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.setup = realview_clcd_setup,
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.mmap = versatile_clcd_mmap_dma,
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.remove = versatile_clcd_remove_dma,
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};
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#ifdef CONFIG_LEDS
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#define VA_LEDS_BASE (__io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_LED_OFFSET)
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void realview_leds_event(led_event_t ledevt)
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{
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unsigned long flags;
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u32 val;
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u32 led = 1 << smp_processor_id();
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local_irq_save(flags);
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val = readl(VA_LEDS_BASE);
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switch (ledevt) {
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case led_idle_start:
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val = val & ~led;
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break;
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case led_idle_end:
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val = val | led;
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break;
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case led_timer:
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val = val ^ REALVIEW_SYS_LED7;
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break;
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case led_halted:
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val = 0;
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break;
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default:
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break;
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}
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writel(val, VA_LEDS_BASE);
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local_irq_restore(flags);
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}
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#endif /* CONFIG_LEDS */
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/*
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* Where is the timer (VA)?
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*/
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void __iomem *timer0_va_base;
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void __iomem *timer1_va_base;
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void __iomem *timer2_va_base;
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void __iomem *timer3_va_base;
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/*
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* Set up the clock source and clock events devices
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*/
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void __init realview_timer_init(unsigned int timer_irq)
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{
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u32 val;
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/*
|
|
* set clock frequency:
|
|
* REALVIEW_REFCLK is 32KHz
|
|
* REALVIEW_TIMCLK is 1MHz
|
|
*/
|
|
val = readl(__io_address(REALVIEW_SCTL_BASE));
|
|
writel((REALVIEW_TIMCLK << REALVIEW_TIMER1_EnSel) |
|
|
(REALVIEW_TIMCLK << REALVIEW_TIMER2_EnSel) |
|
|
(REALVIEW_TIMCLK << REALVIEW_TIMER3_EnSel) |
|
|
(REALVIEW_TIMCLK << REALVIEW_TIMER4_EnSel) | val,
|
|
__io_address(REALVIEW_SCTL_BASE));
|
|
|
|
/*
|
|
* Initialise to a known state (all timers off)
|
|
*/
|
|
writel(0, timer0_va_base + TIMER_CTRL);
|
|
writel(0, timer1_va_base + TIMER_CTRL);
|
|
writel(0, timer2_va_base + TIMER_CTRL);
|
|
writel(0, timer3_va_base + TIMER_CTRL);
|
|
|
|
sp804_clocksource_init(timer3_va_base, "timer3");
|
|
sp804_clockevents_init(timer0_va_base, timer_irq, "timer0");
|
|
}
|
|
|
|
/*
|
|
* Setup the memory banks.
|
|
*/
|
|
void realview_fixup(struct tag *tags, char **from, struct meminfo *meminfo)
|
|
{
|
|
/*
|
|
* Most RealView platforms have 512MB contiguous RAM at 0x70000000.
|
|
* Half of this is mirrored at 0.
|
|
*/
|
|
#ifdef CONFIG_REALVIEW_HIGH_PHYS_OFFSET
|
|
meminfo->bank[0].start = 0x70000000;
|
|
meminfo->bank[0].size = SZ_512M;
|
|
meminfo->nr_banks = 1;
|
|
#else
|
|
meminfo->bank[0].start = 0;
|
|
meminfo->bank[0].size = SZ_256M;
|
|
meminfo->nr_banks = 1;
|
|
#endif
|
|
}
|