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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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a60a072c5e
The PMS405 sports 5 SMPS and 13 LDO regulators, add the regulators to pms405 DTS. Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org> Signed-off-by: Khasim Syed Mohammed <khasim.mohammed@linaro.org> Signed-off-by: Vinod Koul <vkoul@kernel.org> [bjorn: updated label] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
146 lines
3.0 KiB
Plaintext
146 lines
3.0 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0
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// Copyright (c) 2018, Linaro Limited
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#include <dt-bindings/spmi/spmi.h>
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#include <dt-bindings/input/linux-event-codes.h>
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#include <dt-bindings/iio/qcom,spmi-vadc.h>
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#include <dt-bindings/thermal/thermal.h>
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/ {
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thermal-zones {
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pms405 {
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polling-delay-passive = <250>;
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polling-delay = <1000>;
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thermal-sensors = <&pms405_temp>;
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trips {
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pms405_alert0: pms405-alert0 {
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temperature = <105000>;
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hysteresis = <2000>;
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type = "passive";
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};
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pms405_crit: pms405-crit {
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temperature = <125000>;
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hysteresis = <2000>;
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type = "critical";
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};
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};
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};
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};
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};
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&spmi_bus {
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pms405_0: pms405@0 {
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compatible = "qcom,spmi-pmic";
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reg = <0x0 SPMI_USID>;
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#address-cells = <1>;
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#size-cells = <0>;
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pms405_gpios: gpio@c000 {
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compatible = "qcom,pms405-gpio";
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reg = <0xc000>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupts = <0 0xc0 0 IRQ_TYPE_NONE>,
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<0 0xc1 0 IRQ_TYPE_NONE>,
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<0 0xc2 0 IRQ_TYPE_NONE>,
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<0 0xc3 0 IRQ_TYPE_NONE>,
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<0 0xc4 0 IRQ_TYPE_NONE>,
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<0 0xc5 0 IRQ_TYPE_NONE>,
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<0 0xc6 0 IRQ_TYPE_NONE>,
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<0 0xc7 0 IRQ_TYPE_NONE>,
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<0 0xc8 0 IRQ_TYPE_NONE>,
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<0 0xc9 0 IRQ_TYPE_NONE>,
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<0 0xca 0 IRQ_TYPE_NONE>,
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<0 0xcb 0 IRQ_TYPE_NONE>;
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};
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pon@800 {
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compatible = "qcom,pms405-pon";
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reg = <0x0800>;
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mode-bootloader = <0x2>;
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mode-recovery = <0x1>;
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pwrkey {
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compatible = "qcom,pm8941-pwrkey";
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interrupts = <0x0 0x8 0 IRQ_TYPE_EDGE_BOTH>;
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debounce = <15625>;
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bias-pull-up;
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linux,code = <KEY_POWER>;
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};
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};
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pms405_temp: temp-alarm@2400 {
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compatible = "qcom,spmi-temp-alarm";
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reg = <0x2400>;
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interrupts = <0 0x24 0 IRQ_TYPE_EDGE_RISING>;
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io-channels = <&pms405_adc ADC5_DIE_TEMP>;
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io-channel-names = "thermal";
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#thermal-sensor-cells = <0>;
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};
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pms405_adc: adc@3100 {
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compatible = "qcom,pms405-adc", "qcom,spmi-adc-rev2";
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reg = <0x3100>;
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interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
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#address-cells = <1>;
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#size-cells = <0>;
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#io-channel-cells = <1>;
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ref_gnd {
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reg = <ADC5_REF_GND>;
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qcom,pre-scaling = <1 1>;
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};
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vref_1p25 {
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reg = <ADC5_1P25VREF>;
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qcom,pre-scaling = <1 1>;
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};
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vph_pwr {
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reg = <ADC5_VPH_PWR>;
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qcom,pre-scaling = <1 3>;
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};
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die_temp {
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reg = <ADC5_DIE_TEMP>;
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qcom,pre-scaling = <1 1>;
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};
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xo_therm_100k_pu {
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reg = <ADC5_XO_THERM_100K_PU>;
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qcom,pre-scaling = <1 1>;
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};
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amux_thm1_100k_pu {
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reg = <ADC5_AMUX_THM1_100K_PU>;
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qcom,pre-scaling = <1 1>;
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};
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amux_thm3_100k_pu {
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reg = <ADC5_AMUX_THM3_100K_PU>;
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qcom,pre-scaling = <1 1>;
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};
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};
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rtc@6000 {
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compatible = "qcom,pm8941-rtc";
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reg = <0x6000>;
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reg-names = "rtc", "alarm";
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interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>;
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};
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};
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pms405_1: pms405@1 {
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compatible = "qcom,spmi-pmic";
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reg = <0x1 SPMI_USID>;
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#address-cells = <1>;
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#size-cells = <0>;
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pms405_spmi_regulators: regulators {
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compatible = "qcom,pms405-regulators";
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};
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};
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};
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