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71a0a72456
Some GCC versions (e.g. 4.8.3) can incorrectly inline a function with
MIPS32 instructions into another function with MIPS16 code [1], causing
the assembler to genereate incorrect binary code or fail right away
complaining about unrecognized opcode.
In the case of __arch_swab{16,32}, when inlined by the compiler with
flags `-mips32r2 -mips16 -Os', the assembler can fail with the following
error.
{standard input}:79: Error: unrecognized opcode `wsbh $2,$2'
For performance concerns and to workaround the issue already existing in
older compilers, just ignore these 2 functions when compiling with
mips16 enabled.
[1] Inlining nomips16 function into mips16 function can result in
undefined builtins, https://gcc.gnu.org/bugzilla/show_bug.cgi?id=55777
Signed-off-by: Yousong Zhou <yszhou4tech@gmail.com>
Cc: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/11241/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
71 lines
1.4 KiB
C
71 lines
1.4 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 1996, 99, 2003 by Ralf Baechle
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*/
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#ifndef _ASM_SWAB_H
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#define _ASM_SWAB_H
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#include <linux/compiler.h>
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#include <linux/types.h>
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#define __SWAB_64_THRU_32__
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#if !defined(__mips16) && \
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((defined(__mips_isa_rev) && (__mips_isa_rev >= 2)) || \
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defined(_MIPS_ARCH_LOONGSON3A))
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static inline __attribute_const__ __u16 __arch_swab16(__u16 x)
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{
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__asm__(
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" .set push \n"
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" .set arch=mips32r2 \n"
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" wsbh %0, %1 \n"
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" .set pop \n"
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: "=r" (x)
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: "r" (x));
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return x;
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}
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#define __arch_swab16 __arch_swab16
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static inline __attribute_const__ __u32 __arch_swab32(__u32 x)
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{
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__asm__(
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" .set push \n"
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" .set arch=mips32r2 \n"
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" wsbh %0, %1 \n"
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" rotr %0, %0, 16 \n"
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" .set pop \n"
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: "=r" (x)
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: "r" (x));
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return x;
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}
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#define __arch_swab32 __arch_swab32
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/*
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* Having already checked for MIPS R2, enable the optimized version for
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* 64-bit kernel on r2 CPUs.
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*/
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#ifdef __mips64
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static inline __attribute_const__ __u64 __arch_swab64(__u64 x)
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{
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__asm__(
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" .set push \n"
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" .set arch=mips64r2 \n"
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" dsbh %0, %1 \n"
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" dshd %0, %0 \n"
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" .set pop \n"
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: "=r" (x)
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: "r" (x));
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return x;
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}
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#define __arch_swab64 __arch_swab64
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#endif /* __mips64 */
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#endif /* (not __mips16) and (MIPS R2 or newer or Loongson 3A) */
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#endif /* _ASM_SWAB_H */
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