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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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0718e59ae2
The Freescale esdhc driver is the only driver which needs the interrupt registers restored after a reset. Move this quirk to be part of the ESDHC driver implementation. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Tested-by: Markus Pargmann <mpa@pengutronix.de> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Chris Ball <chris@printf.net>
52 lines
1.5 KiB
C
52 lines
1.5 KiB
C
/*
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* Freescale eSDHC controller driver generics for OF and pltfm.
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*
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* Copyright (c) 2007 Freescale Semiconductor, Inc.
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* Copyright (c) 2009 MontaVista Software, Inc.
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* Copyright (c) 2010 Pengutronix e.K.
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* Author: Wolfram Sang <w.sang@pengutronix.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License.
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*/
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#ifndef _DRIVERS_MMC_SDHCI_ESDHC_H
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#define _DRIVERS_MMC_SDHCI_ESDHC_H
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/*
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* Ops and quirks for the Freescale eSDHC controller.
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*/
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#define ESDHC_DEFAULT_QUIRKS (SDHCI_QUIRK_FORCE_BLK_SZ_2048 | \
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SDHCI_QUIRK_NO_BUSY_IRQ | \
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SDHCI_QUIRK_NONSTANDARD_CLOCK | \
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SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK | \
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SDHCI_QUIRK_PIO_NEEDS_DELAY)
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#define ESDHC_SYSTEM_CONTROL 0x2c
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#define ESDHC_CLOCK_MASK 0x0000fff0
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#define ESDHC_PREDIV_SHIFT 8
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#define ESDHC_DIVIDER_SHIFT 4
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#define ESDHC_CLOCK_PEREN 0x00000004
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#define ESDHC_CLOCK_HCKEN 0x00000002
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#define ESDHC_CLOCK_IPGEN 0x00000001
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/* pltfm-specific */
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#define ESDHC_HOST_CONTROL_LE 0x20
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/*
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* P2020 interpretation of the SDHCI_HOST_CONTROL register
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*/
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#define ESDHC_CTRL_4BITBUS (0x1 << 1)
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#define ESDHC_CTRL_8BITBUS (0x2 << 1)
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#define ESDHC_CTRL_BUSWIDTH_MASK (0x3 << 1)
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/* OF-specific */
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#define ESDHC_DMA_SYSCTL 0x40c
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#define ESDHC_DMA_SNOOP 0x00000040
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#define ESDHC_HOST_CONTROL_RES 0x05
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#endif /* _DRIVERS_MMC_SDHCI_ESDHC_H */
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