Uma Shankar 06a20d2d2d drm/i915: Fix PLL 8x/3 divider for MIPI video mode ... MIPI Video Mode for high res panels (requiring dual link), need a 8X/3 divider to be programmed as 0x2. Modifying the same in this patch. Signed-off-by: Uma Shankar <uma.shankar@intel.com> Signed-off-by: Vidya Srinivas <vidya.srinivas@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1486551058-22596-3-git-send-email-vidya.srinivas@intel.com		2017-02-15 17:32:57 +02:00
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drm	drm/i915: Fix PLL 8x/3 divider for MIPI video mode	2017-02-15 17:32:57 +02:00
host1x	gpu: host1x: Add locking to syncpt	2016-11-11 15:33:13 +01:00
ipu-v3	imx-drm plane update cleanup, YUV formats	2016-11-11 09:31:27 +10:00
vga	vgaarb: use valid dev pointer in vgaarb_info()	2016-11-22 16:40:35 +01:00
Makefile