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9d6b4efc16
Add support for the clock. Currently we enable at probe and relinquish at remove. Reviewed-by: Guenter Roeck <linux@roeck-us.net> Acked-by: Sören Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
27 lines
849 B
Plaintext
27 lines
849 B
Plaintext
Xilinx AXI/PLB soft-core watchdog Device Tree Bindings
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---------------------------------------------------------
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Required properties:
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- compatible : Should be "xlnx,xps-timebase-wdt-1.00.a" or
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"xlnx,xps-timebase-wdt-1.01.a".
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- reg : Physical base address and size
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Optional properties:
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- clocks : Input clock specifier. Refer to common clock
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bindings.
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- clock-frequency : Frequency of clock in Hz
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- xlnx,wdt-enable-once : 0 - Watchdog can be restarted
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1 - Watchdog can be enabled just once
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- xlnx,wdt-interval : Watchdog timeout interval in 2^<val> clock cycles,
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<val> is integer from 8 to 31.
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Example:
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axi-timebase-wdt@40100000 {
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clock-frequency = <50000000>;
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compatible = "xlnx,xps-timebase-wdt-1.00.a";
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clocks = <&clkc 15>;
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reg = <0x40100000 0x10000>;
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xlnx,wdt-enable-once = <0x0>;
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xlnx,wdt-interval = <0x1b>;
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} ;
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