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69eb8b1186
Add the watchdog bindings for Freescale i.MX7ULP. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Rob Herring <rohb@kernel.org> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Link: https://lore.kernel.org/r/1566999303-18795-1-git-send-email-Anson.Huang@nxp.com Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
23 lines
688 B
Plaintext
23 lines
688 B
Plaintext
* Freescale i.MX7ULP Watchdog Timer (WDT) Controller
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Required properties:
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- compatible : Should be "fsl,imx7ulp-wdt"
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- reg : Should contain WDT registers location and length
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- interrupts : Should contain WDT interrupt
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- clocks: Should contain a phandle pointing to the gated peripheral clock.
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Optional properties:
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- timeout-sec : Contains the watchdog timeout in seconds
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Examples:
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wdog1: watchdog@403d0000 {
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compatible = "fsl,imx7ulp-wdt";
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reg = <0x403d0000 0x10000>;
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interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&pcc2 IMX7ULP_CLK_WDG1>;
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assigned-clocks = <&pcc2 IMX7ULP_CLK_WDG1>;
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assigned-clocks-parents = <&scg1 IMX7ULP_CLK_FIRC_BUS_CLK>;
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timeout-sec = <40>;
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};
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