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06019be31a
linux_dsm_epyc7002/arch/mn10300/include
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Akira Takeuchi 06019be31a MN10300: Don't hard code the cacheline size in register defs 
Don't hard code the cacheline size in the cache control register definitions.

Signed-off-by: Akira Takeuchi <takeuchi.akr@jp.panasonic.com>
Signed-off-by: Kiyoshi Owada <owada.kiyoshi@jp.panasonic.com>
Signed-off-by: David Howells <dhowells@redhat.com>
2010-10-27 17:28:39 +01:00
..
asm MN10300: Don't hard code the cacheline size in register defs 2010-10-27 17:28:39 +01:00