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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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ab2c913297
When system is suspended in clock stop mode on intel platforms, both master and slave are in clock stop mode and soundwire bus is taken over by a glue hardware. The bus message for jack event is processed by this glue hardware, which will trigger an interrupt to resume audio pci device. Then audio pci driver will resume soundwire master and slave, transfer bus ownership to master, finally slave will report jack event to master and codec driver is triggered to check jack status. if a slave has been attached to a bus, the slave->dev_num_sticky should be non-zero, so we can check this value to skip the ghost devices defined in ACPI table but not populated in hardware. Signed-off-by: Rander Wang <rander.wang@intel.com> Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com> Link: https://lore.kernel.org/r/20200716150947.22119-9-yung-chuan.liao@linux.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
53 lines
1.5 KiB
C
53 lines
1.5 KiB
C
/* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */
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/* Copyright(c) 2015-17 Intel Corporation. */
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#ifndef __SDW_INTEL_LOCAL_H
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#define __SDW_INTEL_LOCAL_H
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/**
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* struct sdw_intel_link_res - Soundwire Intel link resource structure,
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* typically populated by the controller driver.
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* @pdev: platform_device
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* @mmio_base: mmio base of SoundWire registers
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* @registers: Link IO registers base
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* @shim: Audio shim pointer
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* @alh: ALH (Audio Link Hub) pointer
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* @irq: Interrupt line
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* @ops: Shim callback ops
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* @dev: device implementing hw_params and free callbacks
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* @shim_lock: mutex to handle access to shared SHIM registers
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* @shim_mask: global pointer to check SHIM register initialization
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* @cdns: Cadence master descriptor
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* @list: used to walk-through all masters exposed by the same controller
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*/
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struct sdw_intel_link_res {
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struct platform_device *pdev;
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void __iomem *mmio_base; /* not strictly needed, useful for debug */
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void __iomem *registers;
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void __iomem *shim;
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void __iomem *alh;
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int irq;
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const struct sdw_intel_ops *ops;
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struct device *dev;
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struct mutex *shim_lock; /* protect shared registers */
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u32 *shim_mask;
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struct sdw_cdns *cdns;
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struct list_head list;
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};
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struct sdw_intel {
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struct sdw_cdns cdns;
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int instance;
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struct sdw_intel_link_res *link_res;
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#ifdef CONFIG_DEBUG_FS
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struct dentry *debugfs;
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#endif
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};
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#define SDW_INTEL_QUIRK_MASK_BUS_DISABLE BIT(1)
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int intel_master_startup(struct platform_device *pdev);
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int intel_master_process_wakeen_event(struct platform_device *pdev);
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#endif /* __SDW_INTEL_LOCAL_H */
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