mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-25 23:55:36 +07:00
126 lines
3.0 KiB
C
126 lines
3.0 KiB
C
/*
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* Copyright (C) 2008-2010 Thomas Chou <thomas@wytron.com.tw>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*
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*/
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#include <linux/io.h>
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#if (defined(CONFIG_SERIAL_ALTERA_JTAGUART_CONSOLE) && defined(JTAG_UART_BASE))\
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|| (defined(CONFIG_SERIAL_ALTERA_UART_CONSOLE) && defined(UART0_BASE))
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static void *my_ioremap(unsigned long physaddr)
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{
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return (void *)(physaddr | CONFIG_NIOS2_IO_REGION_BASE);
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}
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#endif
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#if defined(CONFIG_SERIAL_ALTERA_JTAGUART_CONSOLE) && defined(JTAG_UART_BASE)
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#define ALTERA_JTAGUART_SIZE 8
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#define ALTERA_JTAGUART_DATA_REG 0
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#define ALTERA_JTAGUART_CONTROL_REG 4
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#define ALTERA_JTAGUART_CONTROL_AC_MSK (0x00000400)
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#define ALTERA_JTAGUART_CONTROL_WSPACE_MSK (0xFFFF0000)
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static void *uartbase;
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#if defined(CONFIG_SERIAL_ALTERA_JTAGUART_CONSOLE_BYPASS)
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static void jtag_putc(int ch)
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{
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if (readl(uartbase + ALTERA_JTAGUART_CONTROL_REG) &
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ALTERA_JTAGUART_CONTROL_WSPACE_MSK)
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writeb(ch, uartbase + ALTERA_JTAGUART_DATA_REG);
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}
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#else
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static void jtag_putc(int ch)
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{
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while ((readl(uartbase + ALTERA_JTAGUART_CONTROL_REG) &
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ALTERA_JTAGUART_CONTROL_WSPACE_MSK) == 0)
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;
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writeb(ch, uartbase + ALTERA_JTAGUART_DATA_REG);
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}
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#endif
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static int putchar(int ch)
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{
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jtag_putc(ch);
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return ch;
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}
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static void console_init(void)
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{
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uartbase = my_ioremap((unsigned long) JTAG_UART_BASE);
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writel(ALTERA_JTAGUART_CONTROL_AC_MSK,
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uartbase + ALTERA_JTAGUART_CONTROL_REG);
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}
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#elif defined(CONFIG_SERIAL_ALTERA_UART_CONSOLE) && defined(UART0_BASE)
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#define ALTERA_UART_SIZE 32
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#define ALTERA_UART_TXDATA_REG 4
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#define ALTERA_UART_STATUS_REG 8
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#define ALTERA_UART_DIVISOR_REG 16
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#define ALTERA_UART_STATUS_TRDY_MSK (0x40)
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static unsigned uartbase;
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static void uart_putc(int ch)
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{
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int i;
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for (i = 0; (i < 0x10000); i++) {
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if (readw(uartbase + ALTERA_UART_STATUS_REG) &
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ALTERA_UART_STATUS_TRDY_MSK)
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break;
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}
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writeb(ch, uartbase + ALTERA_UART_TXDATA_REG);
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}
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static int putchar(int ch)
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{
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uart_putc(ch);
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if (ch == '\n')
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uart_putc('\r');
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return ch;
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}
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static void console_init(void)
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{
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unsigned int baud, baudclk;
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uartbase = (unsigned long) my_ioremap((unsigned long) UART0_BASE);
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baud = CONFIG_SERIAL_ALTERA_UART_BAUDRATE;
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baudclk = UART0_FREQ / baud;
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writew(baudclk, uartbase + ALTERA_UART_DIVISOR_REG);
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}
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#else
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static int putchar(int ch)
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{
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return ch;
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}
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static void console_init(void)
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{
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}
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#endif
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static int puts(const char *s)
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{
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while (*s)
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putchar(*s++);
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return 0;
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}
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