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With commitc814a4c7c4, the meaning of tempX_max was changed. It no longer returns the value of bits 8:15 of MSR_IA32_TEMPERATURE_TARGET, but instead returns the value of CPU threshold register T1. tempX_max_hyst was added to reflect the value of temperature threshold register T0. As it turns out, T0 and T1 are used on some systems, presumably by the BIOS. Also, T0 and T1 don't have a well defined meaning. The thresholds may be used as upper or lower limits, and it is not guaranteed that T0 <= T1. Thus, the new attribute mapping does not reflect the actual usage of the threshold registers. Also, register contents are changed during runtime by an entity other than the hwmon driver, meaning the values cached by the driver do not reflect actual register contents. Revert most ofc814a4c7c4to address the problem. Support for T0 and T1 will be added back in with a separate commit, using new attribute names. Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com> Cc: Fenghua Yu <fenghua.yu@intel.com> Cc: Durgadoss R <durgadoss.r@intel.com> Acked-by: Jean Delvare <khali@linux-fr.org>
150 lines
4.6 KiB
Plaintext
150 lines
4.6 KiB
Plaintext
Kernel driver coretemp
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======================
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Supported chips:
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* All Intel Core family
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Prefix: 'coretemp'
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CPUID: family 0x6, models 0xe (Pentium M DC), 0xf (Core 2 DC 65nm),
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0x16 (Core 2 SC 65nm), 0x17 (Penryn 45nm),
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0x1a (Nehalem), 0x1c (Atom), 0x1e (Lynnfield)
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Datasheet: Intel 64 and IA-32 Architectures Software Developer's Manual
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Volume 3A: System Programming Guide
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http://softwarecommunity.intel.com/Wiki/Mobility/720.htm
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Author: Rudolf Marek
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Description
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-----------
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This driver permits reading the DTS (Digital Temperature Sensor) embedded
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inside Intel CPUs. This driver can read both the per-core and per-package
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temperature using the appropriate sensors. The per-package sensor is new;
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as of now, it is present only in the SandyBridge platform. The driver will
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show the temperature of all cores inside a package under a single device
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directory inside hwmon.
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Temperature is measured in degrees Celsius and measurement resolution is
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1 degree C. Valid temperatures are from 0 to TjMax degrees C, because
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the actual value of temperature register is in fact a delta from TjMax.
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Temperature known as TjMax is the maximum junction temperature of processor,
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which depends on the CPU model. See table below. At this temperature, protection
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mechanism will perform actions to forcibly cool down the processor. Alarm
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may be raised, if the temperature grows enough (more than TjMax) to trigger
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the Out-Of-Spec bit. Following table summarizes the exported sysfs files:
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All Sysfs entries are named with their core_id (represented here by 'X').
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tempX_input - Core temperature (in millidegrees Celsius).
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tempX_max - All cooling devices should be turned on (on Core2).
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tempX_crit - Maximum junction temperature (in millidegrees Celsius).
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tempX_crit_alarm - Set when Out-of-spec bit is set, never clears.
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Correct CPU operation is no longer guaranteed.
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tempX_label - Contains string "Core X", where X is processor
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number. For Package temp, this will be "Physical id Y",
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where Y is the package number.
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On CPU models which support it, TjMax is read from a model-specific register.
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On other models, it is set to an arbitrary value based on weak heuristics.
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If these heuristics don't work for you, you can pass the correct TjMax value
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as a module parameter (tjmax).
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Appendix A. Known TjMax lists (TBD):
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Some information comes from ark.intel.com
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Process Processor TjMax(C)
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32nm Core i3/i5/i7 Processors
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i7 660UM/640/620, 640LM/620, 620M, 610E 105
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i5 540UM/520/430, 540M/520/450/430 105
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i3 330E, 370M/350/330 90 rPGA, 105 BGA
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i3 330UM 105
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32nm Core i7 Extreme Processors
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980X 100
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32nm Celeron Processors
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U3400 105
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P4505/P4500 90
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45nm Xeon Processors 5400 Quad-Core
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X5492, X5482, X5472, X5470, X5460, X5450 85
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E5472, E5462, E5450/40/30/20/10/05 85
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L5408 95
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L5430, L5420, L5410 70
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45nm Xeon Processors 5200 Dual-Core
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X5282, X5272, X5270, X5260 90
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E5240 90
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E5205, E5220 70, 90
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L5240 70
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L5238, L5215 95
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45nm Atom Processors
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D525/510/425/410 100
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Z560/550/540/530P/530/520PT/520/515/510PT/510P 90
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Z510/500 90
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N475/470/455/450 100
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N280/270 90
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330/230 125
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45nm Core2 Processors
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Solo ULV SU3500/3300 100
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T9900/9800/9600/9550/9500/9400/9300/8300/8100 105
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T6670/6500/6400 105
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T6600 90
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SU9600/9400/9300 105
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SP9600/9400 105
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SL9600/9400/9380/9300 105
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P9700/9600/9500/8800/8700/8600/8400/7570 105
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P7550/7450 90
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45nm Core2 Quad Processors
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Q9100/9000 100
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45nm Core2 Extreme Processors
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X9100/9000 105
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QX9300 100
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45nm Core i3/i5/i7 Processors
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i7 940XM/920 100
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i7 840QM/820/740/720 100
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45nm Celeron Processors
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SU2300 100
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900 105
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65nm Core2 Duo Processors
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Solo U2200, U2100 100
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U7700/7600/7500 100
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T7800/7700/7600/7500/7400/7300/7250/7200/7100 100
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T5870/5670/5600/5550/5500/5470/5450/5300/5270 100
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T5250 100
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T5800/5750/5200 85
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L7700/7500/7400/7300/7200 100
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65nm Core2 Extreme Processors
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X7900/7800 100
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65nm Core Duo Processors
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U2500/2400 100
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T2700/2600/2450/2400/2350/2300E/2300/2250/2050 100
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L2500/2400/2300 100
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65nm Core Solo Processors
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U1500/1400/1300 100
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T1400/1350/1300/1250 100
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65nm Xeon Processors 5000 Quad-Core
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X5000 90-95
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E5000 80
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L5000 70
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L5318 95
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65nm Xeon Processors 5000 Dual-Core
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5080, 5063, 5060, 5050, 5030 80-90
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5160, 5150, 5148, 5140, 5130, 5120, 5110 80
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L5138 100
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65nm Celeron Processors
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T1700/1600 100
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560/550/540/530 100
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