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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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a65ddcebab
Use the wrapper function for retrieving the platform data instead of accessing dev->platform_data directly. This is a cosmetic change to make the code simpler and enhance the readability. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
395 lines
9.1 KiB
C
395 lines
9.1 KiB
C
/* drivers/rtc/rtc-v3020.c
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*
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* Copyright (C) 2006 8D Technologies inc.
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* Copyright (C) 2004 Compulab Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Driver for the V3020 RTC
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*
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* Changelog:
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*
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* 10-May-2006: Raphael Assenat <raph@8d.com>
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* - Converted to platform driver
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* - Use the generic rtc class
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*
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* ??-???-2004: Someone at Compulab
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* - Initial driver creation.
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*
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*/
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#include <linux/platform_device.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/rtc.h>
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#include <linux/types.h>
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#include <linux/bcd.h>
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#include <linux/rtc-v3020.h>
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#include <linux/delay.h>
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#include <linux/gpio.h>
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#include <linux/slab.h>
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#include <linux/io.h>
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#undef DEBUG
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struct v3020;
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struct v3020_chip_ops {
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int (*map_io)(struct v3020 *chip, struct platform_device *pdev,
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struct v3020_platform_data *pdata);
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void (*unmap_io)(struct v3020 *chip);
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unsigned char (*read_bit)(struct v3020 *chip);
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void (*write_bit)(struct v3020 *chip, unsigned char bit);
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};
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#define V3020_CS 0
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#define V3020_WR 1
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#define V3020_RD 2
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#define V3020_IO 3
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struct v3020_gpio {
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const char *name;
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unsigned int gpio;
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};
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struct v3020 {
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/* MMIO access */
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void __iomem *ioaddress;
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int leftshift;
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/* GPIO access */
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struct v3020_gpio *gpio;
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struct v3020_chip_ops *ops;
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struct rtc_device *rtc;
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};
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static int v3020_mmio_map(struct v3020 *chip, struct platform_device *pdev,
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struct v3020_platform_data *pdata)
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{
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if (pdev->num_resources != 1)
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return -EBUSY;
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if (pdev->resource[0].flags != IORESOURCE_MEM)
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return -EBUSY;
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chip->leftshift = pdata->leftshift;
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chip->ioaddress = ioremap(pdev->resource[0].start, 1);
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if (chip->ioaddress == NULL)
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return -EBUSY;
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return 0;
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}
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static void v3020_mmio_unmap(struct v3020 *chip)
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{
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iounmap(chip->ioaddress);
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}
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static void v3020_mmio_write_bit(struct v3020 *chip, unsigned char bit)
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{
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writel(bit << chip->leftshift, chip->ioaddress);
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}
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static unsigned char v3020_mmio_read_bit(struct v3020 *chip)
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{
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return !!(readl(chip->ioaddress) & (1 << chip->leftshift));
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}
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static struct v3020_chip_ops v3020_mmio_ops = {
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.map_io = v3020_mmio_map,
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.unmap_io = v3020_mmio_unmap,
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.read_bit = v3020_mmio_read_bit,
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.write_bit = v3020_mmio_write_bit,
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};
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static struct v3020_gpio v3020_gpio[] = {
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{ "RTC CS", 0 },
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{ "RTC WR", 0 },
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{ "RTC RD", 0 },
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{ "RTC IO", 0 },
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};
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static int v3020_gpio_map(struct v3020 *chip, struct platform_device *pdev,
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struct v3020_platform_data *pdata)
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{
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int i, err;
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v3020_gpio[V3020_CS].gpio = pdata->gpio_cs;
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v3020_gpio[V3020_WR].gpio = pdata->gpio_wr;
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v3020_gpio[V3020_RD].gpio = pdata->gpio_rd;
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v3020_gpio[V3020_IO].gpio = pdata->gpio_io;
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for (i = 0; i < ARRAY_SIZE(v3020_gpio); i++) {
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err = gpio_request(v3020_gpio[i].gpio, v3020_gpio[i].name);
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if (err)
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goto err_request;
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gpio_direction_output(v3020_gpio[i].gpio, 1);
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}
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chip->gpio = v3020_gpio;
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return 0;
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err_request:
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while (--i >= 0)
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gpio_free(v3020_gpio[i].gpio);
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return err;
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}
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static void v3020_gpio_unmap(struct v3020 *chip)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(v3020_gpio); i++)
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gpio_free(v3020_gpio[i].gpio);
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}
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static void v3020_gpio_write_bit(struct v3020 *chip, unsigned char bit)
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{
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gpio_direction_output(chip->gpio[V3020_IO].gpio, bit);
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gpio_set_value(chip->gpio[V3020_CS].gpio, 0);
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gpio_set_value(chip->gpio[V3020_WR].gpio, 0);
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udelay(1);
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gpio_set_value(chip->gpio[V3020_WR].gpio, 1);
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gpio_set_value(chip->gpio[V3020_CS].gpio, 1);
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}
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static unsigned char v3020_gpio_read_bit(struct v3020 *chip)
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{
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int bit;
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gpio_direction_input(chip->gpio[V3020_IO].gpio);
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gpio_set_value(chip->gpio[V3020_CS].gpio, 0);
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gpio_set_value(chip->gpio[V3020_RD].gpio, 0);
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udelay(1);
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bit = !!gpio_get_value(chip->gpio[V3020_IO].gpio);
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udelay(1);
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gpio_set_value(chip->gpio[V3020_RD].gpio, 1);
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gpio_set_value(chip->gpio[V3020_CS].gpio, 1);
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return bit;
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}
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static struct v3020_chip_ops v3020_gpio_ops = {
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.map_io = v3020_gpio_map,
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.unmap_io = v3020_gpio_unmap,
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.read_bit = v3020_gpio_read_bit,
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.write_bit = v3020_gpio_write_bit,
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};
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static void v3020_set_reg(struct v3020 *chip, unsigned char address,
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unsigned char data)
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{
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int i;
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unsigned char tmp;
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tmp = address;
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for (i = 0; i < 4; i++) {
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chip->ops->write_bit(chip, (tmp & 1));
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tmp >>= 1;
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udelay(1);
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}
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/* Commands dont have data */
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if (!V3020_IS_COMMAND(address)) {
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for (i = 0; i < 8; i++) {
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chip->ops->write_bit(chip, (data & 1));
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data >>= 1;
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udelay(1);
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}
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}
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}
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static unsigned char v3020_get_reg(struct v3020 *chip, unsigned char address)
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{
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unsigned int data = 0;
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int i;
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for (i = 0; i < 4; i++) {
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chip->ops->write_bit(chip, (address & 1));
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address >>= 1;
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udelay(1);
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}
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for (i = 0; i < 8; i++) {
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data >>= 1;
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if (chip->ops->read_bit(chip))
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data |= 0x80;
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udelay(1);
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}
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return data;
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}
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static int v3020_read_time(struct device *dev, struct rtc_time *dt)
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{
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struct v3020 *chip = dev_get_drvdata(dev);
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int tmp;
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/* Copy the current time to ram... */
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v3020_set_reg(chip, V3020_CMD_CLOCK2RAM, 0);
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/* ...and then read constant values. */
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tmp = v3020_get_reg(chip, V3020_SECONDS);
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dt->tm_sec = bcd2bin(tmp);
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tmp = v3020_get_reg(chip, V3020_MINUTES);
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dt->tm_min = bcd2bin(tmp);
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tmp = v3020_get_reg(chip, V3020_HOURS);
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dt->tm_hour = bcd2bin(tmp);
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tmp = v3020_get_reg(chip, V3020_MONTH_DAY);
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dt->tm_mday = bcd2bin(tmp);
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tmp = v3020_get_reg(chip, V3020_MONTH);
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dt->tm_mon = bcd2bin(tmp) - 1;
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tmp = v3020_get_reg(chip, V3020_WEEK_DAY);
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dt->tm_wday = bcd2bin(tmp);
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tmp = v3020_get_reg(chip, V3020_YEAR);
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dt->tm_year = bcd2bin(tmp)+100;
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dev_dbg(dev, "\n%s : Read RTC values\n", __func__);
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dev_dbg(dev, "tm_hour: %i\n", dt->tm_hour);
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dev_dbg(dev, "tm_min : %i\n", dt->tm_min);
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dev_dbg(dev, "tm_sec : %i\n", dt->tm_sec);
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dev_dbg(dev, "tm_year: %i\n", dt->tm_year);
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dev_dbg(dev, "tm_mon : %i\n", dt->tm_mon);
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dev_dbg(dev, "tm_mday: %i\n", dt->tm_mday);
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dev_dbg(dev, "tm_wday: %i\n", dt->tm_wday);
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return 0;
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}
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static int v3020_set_time(struct device *dev, struct rtc_time *dt)
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{
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struct v3020 *chip = dev_get_drvdata(dev);
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dev_dbg(dev, "\n%s : Setting RTC values\n", __func__);
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dev_dbg(dev, "tm_sec : %i\n", dt->tm_sec);
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dev_dbg(dev, "tm_min : %i\n", dt->tm_min);
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dev_dbg(dev, "tm_hour: %i\n", dt->tm_hour);
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dev_dbg(dev, "tm_mday: %i\n", dt->tm_mday);
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dev_dbg(dev, "tm_wday: %i\n", dt->tm_wday);
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dev_dbg(dev, "tm_year: %i\n", dt->tm_year);
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/* Write all the values to ram... */
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v3020_set_reg(chip, V3020_SECONDS, bin2bcd(dt->tm_sec));
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v3020_set_reg(chip, V3020_MINUTES, bin2bcd(dt->tm_min));
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v3020_set_reg(chip, V3020_HOURS, bin2bcd(dt->tm_hour));
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v3020_set_reg(chip, V3020_MONTH_DAY, bin2bcd(dt->tm_mday));
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v3020_set_reg(chip, V3020_MONTH, bin2bcd(dt->tm_mon + 1));
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v3020_set_reg(chip, V3020_WEEK_DAY, bin2bcd(dt->tm_wday));
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v3020_set_reg(chip, V3020_YEAR, bin2bcd(dt->tm_year % 100));
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/* ...and set the clock. */
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v3020_set_reg(chip, V3020_CMD_RAM2CLOCK, 0);
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/* Compulab used this delay here. I dont know why,
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* the datasheet does not specify a delay. */
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/*mdelay(5);*/
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return 0;
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}
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static const struct rtc_class_ops v3020_rtc_ops = {
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.read_time = v3020_read_time,
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.set_time = v3020_set_time,
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};
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static int rtc_probe(struct platform_device *pdev)
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{
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struct v3020_platform_data *pdata = dev_get_platdata(&pdev->dev);
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struct v3020 *chip;
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int retval = -EBUSY;
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int i;
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int temp;
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chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL);
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if (!chip)
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return -ENOMEM;
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if (pdata->use_gpio)
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chip->ops = &v3020_gpio_ops;
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else
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chip->ops = &v3020_mmio_ops;
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retval = chip->ops->map_io(chip, pdev, pdata);
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if (retval)
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return retval;
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/* Make sure the v3020 expects a communication cycle
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* by reading 8 times */
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for (i = 0; i < 8; i++)
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temp = chip->ops->read_bit(chip);
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/* Test chip by doing a write/read sequence
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* to the chip ram */
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v3020_set_reg(chip, V3020_SECONDS, 0x33);
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if (v3020_get_reg(chip, V3020_SECONDS) != 0x33) {
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retval = -ENODEV;
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goto err_io;
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}
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/* Make sure frequency measurement mode, test modes, and lock
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* are all disabled */
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v3020_set_reg(chip, V3020_STATUS_0, 0x0);
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if (pdata->use_gpio)
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dev_info(&pdev->dev, "Chip available at GPIOs "
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"%d, %d, %d, %d\n",
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chip->gpio[V3020_CS].gpio, chip->gpio[V3020_WR].gpio,
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chip->gpio[V3020_RD].gpio, chip->gpio[V3020_IO].gpio);
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else
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dev_info(&pdev->dev, "Chip available at "
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"physical address 0x%llx,"
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"data connected to D%d\n",
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(unsigned long long)pdev->resource[0].start,
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chip->leftshift);
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platform_set_drvdata(pdev, chip);
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chip->rtc = devm_rtc_device_register(&pdev->dev, "v3020",
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&v3020_rtc_ops, THIS_MODULE);
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if (IS_ERR(chip->rtc)) {
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retval = PTR_ERR(chip->rtc);
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goto err_io;
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}
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return 0;
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err_io:
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chip->ops->unmap_io(chip);
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return retval;
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}
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static int rtc_remove(struct platform_device *dev)
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{
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struct v3020 *chip = platform_get_drvdata(dev);
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chip->ops->unmap_io(chip);
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return 0;
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}
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static struct platform_driver rtc_device_driver = {
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.probe = rtc_probe,
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.remove = rtc_remove,
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.driver = {
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.name = "v3020",
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.owner = THIS_MODULE,
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},
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};
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module_platform_driver(rtc_device_driver);
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MODULE_DESCRIPTION("V3020 RTC");
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MODULE_AUTHOR("Raphael Assenat");
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MODULE_LICENSE("GPL");
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MODULE_ALIAS("platform:v3020");
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