mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-26 15:50:57 +07:00
50544bce4c
- remove all uses of btfixup header - remove the btfixup header - remove the btfixup code Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: David S. Miller <davem@davemloft.net>
93 lines
2.4 KiB
C
93 lines
2.4 KiB
C
#include <linux/platform_device.h>
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#include <asm/cpu_type.h>
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struct irq_bucket {
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struct irq_bucket *next;
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unsigned int real_irq;
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unsigned int irq;
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unsigned int pil;
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};
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#define SUN4M_HARD_INT(x) (0x000000001 << (x))
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#define SUN4M_SOFT_INT(x) (0x000010000 << (x))
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#define SUN4D_MAX_BOARD 10
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#define SUN4D_MAX_IRQ ((SUN4D_MAX_BOARD + 2) << 5)
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/* Map between the irq identifier used in hw to the
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* irq_bucket. The map is sufficient large to hold
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* the sun4d hw identifiers.
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*/
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extern struct irq_bucket *irq_map[SUN4D_MAX_IRQ];
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/* sun4m specific type definitions */
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/* This maps direct to CPU specific interrupt registers */
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struct sun4m_irq_percpu {
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u32 pending;
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u32 clear;
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u32 set;
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};
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/* This maps direct to global interrupt registers */
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struct sun4m_irq_global {
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u32 pending;
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u32 mask;
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u32 mask_clear;
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u32 mask_set;
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u32 interrupt_target;
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};
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extern struct sun4m_irq_percpu __iomem *sun4m_irq_percpu[SUN4M_NCPUS];
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extern struct sun4m_irq_global __iomem *sun4m_irq_global;
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/* The following definitions describe the individual platform features: */
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#define FEAT_L10_CLOCKSOURCE (1 << 0) /* L10 timer is used as a clocksource */
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#define FEAT_L10_CLOCKEVENT (1 << 1) /* L10 timer is used as a clockevent */
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#define FEAT_L14_ONESHOT (1 << 2) /* L14 timer clockevent can oneshot */
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/*
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* Platform specific configuration
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* The individual platforms assign their platform
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* specifics in their init functions.
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*/
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struct sparc_config {
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void (*init_timers)(void);
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unsigned int (*build_device_irq)(struct platform_device *op,
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unsigned int real_irq);
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/* generic clockevent features - see FEAT_* above */
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int features;
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/* clock rate used for clock event timer */
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int clock_rate;
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/* one period for clock source timer */
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unsigned int cs_period;
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/* function to obtain offsett for cs period */
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unsigned int (*get_cycles_offset)(void);
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void (*clear_clock_irq)(void);
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void (*load_profile_irq)(int cpu, unsigned int limit);
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};
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extern struct sparc_config sparc_config;
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unsigned int irq_alloc(unsigned int real_irq, unsigned int pil);
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void irq_link(unsigned int irq);
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void irq_unlink(unsigned int irq);
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void handler_irq(unsigned int pil, struct pt_regs *regs);
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unsigned long leon_get_irqmask(unsigned int irq);
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#ifdef CONFIG_SMP
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/* All SUN4D IPIs are sent on this IRQ, may be shared with hard IRQs */
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#define SUN4D_IPI_IRQ 13
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extern void sun4d_ipi_interrupt(void);
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#endif
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