Venkat Reddy Talla 04fac2412b soc/tegra: pmc: Add pins for Tegra194 ... Extend the Tegra194 IO pad table with additional information such as pin names and 1.8/3.3 V settings to allow a table of voltage control pins to generated from it. This is similar to what's done for older chips and is needed to support high-speed modes for SDHCI where switching the pins to 1.8V or 3.3V is necessary. Signed-off-by: Venkat Reddy Talla <vreddytalla@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>		2020-03-13 10:53:10 +01:00
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fuse	ARM: SoC-related driver updates	2020-02-08 14:04:19 -08:00
common.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500	2019-06-19 17:09:55 +02:00
flowctrl.c	remove ioremap_nocache and devm_ioremap_nocache	2020-01-06 09:45:59 +01:00
Kconfig	soc/tegra: fuse: Add APB DMA dependency for Tegra20	2020-01-10 15:30:11 +01:00
Makefile	soc/tegra: regulators: Add regulators coupler for Tegra30	2019-10-29 14:02:59 +01:00
pmc.c	soc/tegra: pmc: Add pins for Tegra194	2020-03-13 10:53:10 +01:00
powergate-bpmp.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 288	2019-06-05 17:36:37 +02:00
regulators-tegra20.c	soc/tegra: regulators: Do nothing if voltage is unchanged	2020-01-10 15:42:58 +01:00
regulators-tegra30.c	soc/tegra: regulators: Do nothing if voltage is unchanged	2020-01-10 15:42:58 +01:00