Multi Core Timer node has interrupts routed to two different parents -
GIC and combiner. This was modeled with a interrupt-map within a
subnode but can be expressed in an easier and more common way, directly
in the node itself.
Tested on Odroid XU (Exynos5410), Odroid HC1 (Exynos5422) and Arndale
Octa (Exynos5420).
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
