mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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138a6c7f4f
This patch adds header <linux/sched.h> into the below files for build with CONFIG_PREEMPT_NONE. arch/arm/mach-s5p64x0/cpu.c Signed-off-by: Seung-Chull Suh <sc.suh@samsung.com> [kgene.kim@samsung.com: edited title and message] Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
210 lines
4.3 KiB
C
210 lines
4.3 KiB
C
/* linux/arch/arm/mach-s5p64x0/cpu.c
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*
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* Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
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* http://www.samsung.com
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/interrupt.h>
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#include <linux/list.h>
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#include <linux/timer.h>
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#include <linux/init.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/sysdev.h>
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#include <linux/serial_core.h>
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#include <linux/platform_device.h>
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#include <linux/sched.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include <asm/mach/irq.h>
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#include <asm/proc-fns.h>
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#include <asm/irq.h>
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#include <mach/hardware.h>
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#include <mach/map.h>
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#include <mach/regs-clock.h>
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#include <plat/regs-serial.h>
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#include <plat/cpu.h>
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#include <plat/devs.h>
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#include <plat/clock.h>
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#include <plat/s5p6440.h>
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#include <plat/s5p6450.h>
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#include <plat/adc-core.h>
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/* Initial IO mappings */
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static struct map_desc s5p64x0_iodesc[] __initdata = {
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{
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.virtual = (unsigned long)S5P_VA_GPIO,
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.pfn = __phys_to_pfn(S5P64X0_PA_GPIO),
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.length = SZ_4K,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)VA_VIC0,
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.pfn = __phys_to_pfn(S5P64X0_PA_VIC0),
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.length = SZ_16K,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)VA_VIC1,
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.pfn = __phys_to_pfn(S5P64X0_PA_VIC1),
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.length = SZ_16K,
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.type = MT_DEVICE,
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},
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};
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static struct map_desc s5p6440_iodesc[] __initdata = {
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{
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.virtual = (unsigned long)S3C_VA_UART,
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.pfn = __phys_to_pfn(S5P6440_PA_UART(0)),
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.length = SZ_4K,
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.type = MT_DEVICE,
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},
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};
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static struct map_desc s5p6450_iodesc[] __initdata = {
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{
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.virtual = (unsigned long)S3C_VA_UART,
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.pfn = __phys_to_pfn(S5P6450_PA_UART(0)),
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.length = SZ_512K,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)S3C_VA_UART + SZ_512K,
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.pfn = __phys_to_pfn(S5P6450_PA_UART(5)),
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.length = SZ_4K,
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.type = MT_DEVICE,
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},
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};
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static void s5p64x0_idle(void)
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{
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unsigned long val;
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if (!need_resched()) {
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val = __raw_readl(S5P64X0_PWR_CFG);
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val &= ~(0x3 << 5);
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val |= (0x1 << 5);
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__raw_writel(val, S5P64X0_PWR_CFG);
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cpu_do_idle();
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}
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local_irq_enable();
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}
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/*
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* s5p64x0_map_io
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*
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* register the standard CPU IO areas
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*/
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void __init s5p6440_map_io(void)
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{
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/* initialize any device information early */
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s3c_adc_setname("s3c64xx-adc");
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iotable_init(s5p64x0_iodesc, ARRAY_SIZE(s5p64x0_iodesc));
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iotable_init(s5p6440_iodesc, ARRAY_SIZE(s5p6440_iodesc));
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}
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void __init s5p6450_map_io(void)
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{
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/* initialize any device information early */
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s3c_adc_setname("s3c64xx-adc");
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iotable_init(s5p64x0_iodesc, ARRAY_SIZE(s5p64x0_iodesc));
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iotable_init(s5p6450_iodesc, ARRAY_SIZE(s5p6440_iodesc));
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}
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/*
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* s5p64x0_init_clocks
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*
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* register and setup the CPU clocks
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*/
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void __init s5p6440_init_clocks(int xtal)
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{
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printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
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s3c24xx_register_baseclocks(xtal);
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s5p_register_clocks(xtal);
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s5p6440_register_clocks();
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s5p6440_setup_clocks();
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}
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void __init s5p6450_init_clocks(int xtal)
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{
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printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
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s3c24xx_register_baseclocks(xtal);
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s5p_register_clocks(xtal);
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s5p6450_register_clocks();
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s5p6450_setup_clocks();
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}
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/*
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* s5p64x0_init_irq
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*
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* register the CPU interrupts
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*/
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void __init s5p6440_init_irq(void)
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{
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/* S5P6440 supports 2 VIC */
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u32 vic[2];
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/*
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* VIC0 is missing IRQ_VIC0[3, 4, 8, 10, (12-22)]
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* VIC1 is missing IRQ VIC1[1, 3, 4, 10, 11, 12, 14, 15, 22]
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*/
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vic[0] = 0xff800ae7;
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vic[1] = 0xffbf23e5;
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s5p_init_irq(vic, ARRAY_SIZE(vic));
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}
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void __init s5p6450_init_irq(void)
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{
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/* S5P6450 supports only 2 VIC */
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u32 vic[2];
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/*
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* VIC0 is missing IRQ_VIC0[(13-15), (21-22)]
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* VIC1 is missing IRQ VIC1[12, 14, 23]
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*/
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vic[0] = 0xff9f1fff;
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vic[1] = 0xff7fafff;
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s5p_init_irq(vic, ARRAY_SIZE(vic));
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}
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struct sysdev_class s5p64x0_sysclass = {
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.name = "s5p64x0-core",
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};
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static struct sys_device s5p64x0_sysdev = {
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.cls = &s5p64x0_sysclass,
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};
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static int __init s5p64x0_core_init(void)
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{
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return sysdev_class_register(&s5p64x0_sysclass);
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}
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core_initcall(s5p64x0_core_init);
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int __init s5p64x0_init(void)
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{
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printk(KERN_INFO "S5P64X0(S5P6440/S5P6450): Initializing architecture\n");
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/* set idle function */
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pm_idle = s5p64x0_idle;
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return sysdev_register(&s5p64x0_sysdev);
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}
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