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Completion queue (CQ) is the one with which HW notifies SW on a packet reception or transmission. Each of the RQ and SQ are mapped to a unique CQ and again both CQs are mapped to same interrupt ie the CINT. So that each core has one interrupt source in whose handler both Rx and Tx notifications are processed. Also - Registered a NAPI handler for the CINT. - Setup coalescing parameters. - IRQ affinity hints etc Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net> |
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mvpp2 | ||
octeontx2 | ||
Kconfig | ||
Makefile | ||
mv643xx_eth.c | ||
mvmdio.c | ||
mvneta_bm.c | ||
mvneta_bm.h | ||
mvneta.c | ||
pxa168_eth.c | ||
skge.c | ||
skge.h | ||
sky2.c | ||
sky2.h |