mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-24 15:20:58 +07:00
04985d00e2
PLLX may be kept disabled if cpufreq driver selects some other clock for CPU. In that case PLLX will be disabled later in the resume path by the CLK driver, which also can enable PLLX if necessary by itself. Thus there is no need to enable PLLX early during resume. Tegra114/124 CLK drivers do not manage PLLX on resume and thus they are left untouched by this patch. Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com> Tested-by: Peter Geis <pgwipeout@gmail.com> Tested-by: Marcel Ziswiler <marcel@ziswiler.com> Tested-by: Jasper Korten <jja2000@gmail.com> Tested-by: David Heidelberg <david@ixit.cz> Tested-by: Nicolas Chauvet <kwizart@gmail.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com> |
||
|---|---|---|
| .. | ||
| board-paz00.c | ||
| board.h | ||
| common.h | ||
| hotplug.c | ||
| io.c | ||
| iomap.h | ||
| irammap.h | ||
| irq.c | ||
| Kconfig | ||
| Makefile | ||
| platsmp.c | ||
| pm-tegra20.c | ||
| pm-tegra30.c | ||
| pm.c | ||
| pm.h | ||
| reset-handler.S | ||
| reset.c | ||
| reset.h | ||
| sleep-tegra20.S | ||
| sleep-tegra30.S | ||
| sleep.h | ||
| sleep.S | ||
| tegra.c | ||