mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-26 02:25:44 +07:00
3d8dfe75ef
- Pseudo NMI support for arm64 using GICv3 interrupt priorities - uaccess macros clean-up (unsafe user accessors also merged but reverted, waiting for objtool support on arm64) - ptrace regsets for Pointer Authentication (ARMv8.3) key management - inX() ordering w.r.t. delay() on arm64 and riscv (acks in place by the riscv maintainers) - arm64/perf updates: PMU bindings converted to json-schema, unused variable and misleading comment removed - arm64/debug fixes to ensure checking of the triggering exception level and to avoid the propagation of the UNKNOWN FAR value into the si_code for debug signals - Workaround for Fujitsu A64FX erratum 010001 - lib/raid6 ARM NEON optimisations - NR_CPUS now defaults to 256 on arm64 - Minor clean-ups (documentation/comments, Kconfig warning, unused asm-offsets, clang warnings) - MAINTAINERS update for list information to the ARM64 ACPI entry -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEE5RElWfyWxS+3PLO2a9axLQDIXvEFAlyCl0cACgkQa9axLQDI XvEyKxAAiogBZLbyhcy8bTUHVzVoJE0FyAkdO2wWnnaff2Ohkhy1Y/npv33IeK2q RknxqDIx2DUUVPJNRZGoI/WwBtTZdKaAnW4rIKG84yC1eAkFcd96WQasaZzcp1qY HmvbJiYXM0bh+0J7i3Wgry/QzOkrltJFJW2kp6Wd5aFE+R1WyWyxT6d+Fp0J3vlA bT70jlpBK6LXEOmmBS+04Ml02+8MvaGxIl8EInBHSfDLRLErj5E8n41rRHKUiSWz maWI+kVoLYwOE68xiZlDftUBEeQpUSWgg2nxeK+640QSl1wJmVcRcY9nm6TZeMG2 AiZTR9a7cP5rrdSN5suUmb7d4AMMVlVMisGDlwb+9oCxeTRDzg0uwACaVgHfPqQr UeBdHbL9nStN7uBH23H8L9mKk+tqpFmk0sgzdrKejOwysAiqWV8aazb/Na3qnVRl J1B5opxMnGOsjXmHvtG/tiZl281Uwz5ZmzfLmIY3gUZgUgdA3511Egp0ry5y1dzJ SkYC4Hmzb2ybQvXGIDDa3OzCwXXiqyqKsO+O8Egg1k4OIwbp3w+NHE7gKeA+dMgD gjN7zEalCUi46Q28xiCPEb+88BpQ18czIWGQLb9mAnmYeZPjqqenXKXuRHr4lgVe jPURJ/vqvFEglZJN1RDuQHKzHEcm5f2XE566sMZYdSoeiUCb0QM= =2U56 -----END PGP SIGNATURE----- Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux Pull arm64 updates from Catalin Marinas: - Pseudo NMI support for arm64 using GICv3 interrupt priorities - uaccess macros clean-up (unsafe user accessors also merged but reverted, waiting for objtool support on arm64) - ptrace regsets for Pointer Authentication (ARMv8.3) key management - inX() ordering w.r.t. delay() on arm64 and riscv (acks in place by the riscv maintainers) - arm64/perf updates: PMU bindings converted to json-schema, unused variable and misleading comment removed - arm64/debug fixes to ensure checking of the triggering exception level and to avoid the propagation of the UNKNOWN FAR value into the si_code for debug signals - Workaround for Fujitsu A64FX erratum 010001 - lib/raid6 ARM NEON optimisations - NR_CPUS now defaults to 256 on arm64 - Minor clean-ups (documentation/comments, Kconfig warning, unused asm-offsets, clang warnings) - MAINTAINERS update for list information to the ARM64 ACPI entry * tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (54 commits) arm64: mmu: drop paging_init comments arm64: debug: Ensure debug handlers check triggering exception level arm64: debug: Don't propagate UNKNOWN FAR into si_code for debug signals Revert "arm64: uaccess: Implement unsafe accessors" arm64: avoid clang warning about self-assignment arm64: Kconfig.platforms: fix warning unmet direct dependencies lib/raid6: arm: optimize away a mask operation in NEON recovery routine lib/raid6: use vdupq_n_u8 to avoid endianness warnings arm64: io: Hook up __io_par() for inX() ordering riscv: io: Update __io_[p]ar() macros to take an argument asm-generic/io: Pass result of I/O accessor to __io_[p]ar() arm64: Add workaround for Fujitsu A64FX erratum 010001 arm64: Rename get_thread_info() arm64: Remove documentation about TIF_USEDFPU arm64: irqflags: Fix clang build warnings arm64: Enable the support of pseudo-NMIs arm64: Skip irqflags tracing for NMI in IRQs disabled context arm64: Skip preemption when exiting an NMI arm64: Handle serror in NMI context irqchip/gic-v3: Allow interrupts to be set as pseudo-NMI ...
431 lines
11 KiB
C
431 lines
11 KiB
C
/*
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* Based on arch/arm/include/asm/uaccess.h
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*
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* Copyright (C) 2012 ARM Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __ASM_UACCESS_H
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#define __ASM_UACCESS_H
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#include <asm/alternative.h>
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#include <asm/kernel-pgtable.h>
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#include <asm/sysreg.h>
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/*
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* User space memory access functions
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*/
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#include <linux/bitops.h>
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#include <linux/kasan-checks.h>
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#include <linux/string.h>
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#include <asm/cpufeature.h>
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#include <asm/ptrace.h>
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#include <asm/memory.h>
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#include <asm/extable.h>
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#define get_fs() (current_thread_info()->addr_limit)
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static inline void set_fs(mm_segment_t fs)
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{
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current_thread_info()->addr_limit = fs;
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/*
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* Prevent a mispredicted conditional call to set_fs from forwarding
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* the wrong address limit to access_ok under speculation.
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*/
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spec_bar();
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/* On user-mode return, check fs is correct */
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set_thread_flag(TIF_FSCHECK);
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/*
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* Enable/disable UAO so that copy_to_user() etc can access
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* kernel memory with the unprivileged instructions.
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*/
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if (IS_ENABLED(CONFIG_ARM64_UAO) && fs == KERNEL_DS)
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asm(ALTERNATIVE("nop", SET_PSTATE_UAO(1), ARM64_HAS_UAO));
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else
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asm(ALTERNATIVE("nop", SET_PSTATE_UAO(0), ARM64_HAS_UAO,
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CONFIG_ARM64_UAO));
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}
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#define segment_eq(a, b) ((a) == (b))
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/*
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* Test whether a block of memory is a valid user space address.
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* Returns 1 if the range is valid, 0 otherwise.
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*
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* This is equivalent to the following test:
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* (u65)addr + (u65)size <= (u65)current->addr_limit + 1
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*/
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static inline unsigned long __range_ok(const void __user *addr, unsigned long size)
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{
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unsigned long ret, limit = current_thread_info()->addr_limit;
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__chk_user_ptr(addr);
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asm volatile(
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// A + B <= C + 1 for all A,B,C, in four easy steps:
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// 1: X = A + B; X' = X % 2^64
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" adds %0, %3, %2\n"
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// 2: Set C = 0 if X > 2^64, to guarantee X' > C in step 4
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" csel %1, xzr, %1, hi\n"
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// 3: Set X' = ~0 if X >= 2^64. For X == 2^64, this decrements X'
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// to compensate for the carry flag being set in step 4. For
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// X > 2^64, X' merely has to remain nonzero, which it does.
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" csinv %0, %0, xzr, cc\n"
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// 4: For X < 2^64, this gives us X' - C - 1 <= 0, where the -1
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// comes from the carry in being clear. Otherwise, we are
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// testing X' - C == 0, subject to the previous adjustments.
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" sbcs xzr, %0, %1\n"
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" cset %0, ls\n"
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: "=&r" (ret), "+r" (limit) : "Ir" (size), "0" (addr) : "cc");
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return ret;
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}
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#define access_ok(addr, size) __range_ok(addr, size)
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#define user_addr_max get_fs
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#define _ASM_EXTABLE(from, to) \
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" .pushsection __ex_table, \"a\"\n" \
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" .align 3\n" \
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" .long (" #from " - .), (" #to " - .)\n" \
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" .popsection\n"
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/*
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* User access enabling/disabling.
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*/
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#ifdef CONFIG_ARM64_SW_TTBR0_PAN
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static inline void __uaccess_ttbr0_disable(void)
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{
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unsigned long flags, ttbr;
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local_irq_save(flags);
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ttbr = read_sysreg(ttbr1_el1);
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ttbr &= ~TTBR_ASID_MASK;
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/* reserved_ttbr0 placed before swapper_pg_dir */
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write_sysreg(ttbr - RESERVED_TTBR0_SIZE, ttbr0_el1);
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isb();
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/* Set reserved ASID */
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write_sysreg(ttbr, ttbr1_el1);
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isb();
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local_irq_restore(flags);
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}
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static inline void __uaccess_ttbr0_enable(void)
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{
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unsigned long flags, ttbr0, ttbr1;
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/*
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* Disable interrupts to avoid preemption between reading the 'ttbr0'
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* variable and the MSR. A context switch could trigger an ASID
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* roll-over and an update of 'ttbr0'.
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*/
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local_irq_save(flags);
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ttbr0 = READ_ONCE(current_thread_info()->ttbr0);
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/* Restore active ASID */
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ttbr1 = read_sysreg(ttbr1_el1);
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ttbr1 &= ~TTBR_ASID_MASK; /* safety measure */
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ttbr1 |= ttbr0 & TTBR_ASID_MASK;
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write_sysreg(ttbr1, ttbr1_el1);
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isb();
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/* Restore user page table */
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write_sysreg(ttbr0, ttbr0_el1);
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isb();
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local_irq_restore(flags);
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}
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static inline bool uaccess_ttbr0_disable(void)
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{
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if (!system_uses_ttbr0_pan())
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return false;
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__uaccess_ttbr0_disable();
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return true;
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}
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static inline bool uaccess_ttbr0_enable(void)
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{
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if (!system_uses_ttbr0_pan())
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return false;
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__uaccess_ttbr0_enable();
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return true;
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}
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#else
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static inline bool uaccess_ttbr0_disable(void)
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{
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return false;
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}
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static inline bool uaccess_ttbr0_enable(void)
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{
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return false;
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}
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#endif
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static inline void __uaccess_disable_hw_pan(void)
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{
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asm(ALTERNATIVE("nop", SET_PSTATE_PAN(0), ARM64_HAS_PAN,
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CONFIG_ARM64_PAN));
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}
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static inline void __uaccess_enable_hw_pan(void)
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{
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asm(ALTERNATIVE("nop", SET_PSTATE_PAN(1), ARM64_HAS_PAN,
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CONFIG_ARM64_PAN));
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}
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#define __uaccess_disable(alt) \
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do { \
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if (!uaccess_ttbr0_disable()) \
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asm(ALTERNATIVE("nop", SET_PSTATE_PAN(1), alt, \
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CONFIG_ARM64_PAN)); \
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} while (0)
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#define __uaccess_enable(alt) \
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do { \
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if (!uaccess_ttbr0_enable()) \
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asm(ALTERNATIVE("nop", SET_PSTATE_PAN(0), alt, \
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CONFIG_ARM64_PAN)); \
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} while (0)
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static inline void uaccess_disable(void)
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{
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__uaccess_disable(ARM64_HAS_PAN);
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}
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static inline void uaccess_enable(void)
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{
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__uaccess_enable(ARM64_HAS_PAN);
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}
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/*
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* These functions are no-ops when UAO is present.
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*/
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static inline void uaccess_disable_not_uao(void)
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{
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__uaccess_disable(ARM64_ALT_PAN_NOT_UAO);
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}
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static inline void uaccess_enable_not_uao(void)
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{
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__uaccess_enable(ARM64_ALT_PAN_NOT_UAO);
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}
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/*
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* Sanitise a uaccess pointer such that it becomes NULL if above the
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* current addr_limit.
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*/
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#define uaccess_mask_ptr(ptr) (__typeof__(ptr))__uaccess_mask_ptr(ptr)
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static inline void __user *__uaccess_mask_ptr(const void __user *ptr)
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{
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void __user *safe_ptr;
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asm volatile(
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" bics xzr, %1, %2\n"
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" csel %0, %1, xzr, eq\n"
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: "=&r" (safe_ptr)
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: "r" (ptr), "r" (current_thread_info()->addr_limit)
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: "cc");
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csdb();
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return safe_ptr;
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}
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/*
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* The "__xxx" versions of the user access functions do not verify the address
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* space - it must have been done previously with a separate "access_ok()"
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* call.
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*
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* The "__xxx_error" versions set the third argument to -EFAULT if an error
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* occurs, and leave it unchanged on success.
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*/
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#define __get_user_asm(instr, alt_instr, reg, x, addr, err, feature) \
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asm volatile( \
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"1:"ALTERNATIVE(instr " " reg "1, [%2]\n", \
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alt_instr " " reg "1, [%2]\n", feature) \
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"2:\n" \
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" .section .fixup, \"ax\"\n" \
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" .align 2\n" \
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"3: mov %w0, %3\n" \
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" mov %1, #0\n" \
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" b 2b\n" \
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" .previous\n" \
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_ASM_EXTABLE(1b, 3b) \
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: "+r" (err), "=&r" (x) \
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: "r" (addr), "i" (-EFAULT))
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#define __raw_get_user(x, ptr, err) \
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do { \
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unsigned long __gu_val; \
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__chk_user_ptr(ptr); \
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uaccess_enable_not_uao(); \
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switch (sizeof(*(ptr))) { \
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case 1: \
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__get_user_asm("ldrb", "ldtrb", "%w", __gu_val, (ptr), \
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(err), ARM64_HAS_UAO); \
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break; \
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case 2: \
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__get_user_asm("ldrh", "ldtrh", "%w", __gu_val, (ptr), \
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(err), ARM64_HAS_UAO); \
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break; \
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case 4: \
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__get_user_asm("ldr", "ldtr", "%w", __gu_val, (ptr), \
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(err), ARM64_HAS_UAO); \
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break; \
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case 8: \
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__get_user_asm("ldr", "ldtr", "%x", __gu_val, (ptr), \
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(err), ARM64_HAS_UAO); \
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break; \
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default: \
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BUILD_BUG(); \
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} \
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uaccess_disable_not_uao(); \
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(x) = (__force __typeof__(*(ptr)))__gu_val; \
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} while (0)
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#define __get_user_error(x, ptr, err) \
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do { \
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__typeof__(*(ptr)) __user *__p = (ptr); \
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might_fault(); \
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if (access_ok(__p, sizeof(*__p))) { \
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__p = uaccess_mask_ptr(__p); \
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__raw_get_user((x), __p, (err)); \
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} else { \
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(x) = 0; (err) = -EFAULT; \
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} \
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} while (0)
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#define __get_user(x, ptr) \
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({ \
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int __gu_err = 0; \
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__get_user_error((x), (ptr), __gu_err); \
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__gu_err; \
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})
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#define get_user __get_user
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#define __put_user_asm(instr, alt_instr, reg, x, addr, err, feature) \
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asm volatile( \
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"1:"ALTERNATIVE(instr " " reg "1, [%2]\n", \
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alt_instr " " reg "1, [%2]\n", feature) \
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"2:\n" \
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" .section .fixup,\"ax\"\n" \
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" .align 2\n" \
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"3: mov %w0, %3\n" \
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" b 2b\n" \
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" .previous\n" \
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_ASM_EXTABLE(1b, 3b) \
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: "+r" (err) \
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: "r" (x), "r" (addr), "i" (-EFAULT))
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#define __raw_put_user(x, ptr, err) \
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do { \
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__typeof__(*(ptr)) __pu_val = (x); \
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__chk_user_ptr(ptr); \
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uaccess_enable_not_uao(); \
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switch (sizeof(*(ptr))) { \
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case 1: \
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__put_user_asm("strb", "sttrb", "%w", __pu_val, (ptr), \
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(err), ARM64_HAS_UAO); \
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break; \
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case 2: \
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__put_user_asm("strh", "sttrh", "%w", __pu_val, (ptr), \
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(err), ARM64_HAS_UAO); \
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break; \
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case 4: \
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__put_user_asm("str", "sttr", "%w", __pu_val, (ptr), \
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(err), ARM64_HAS_UAO); \
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break; \
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case 8: \
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__put_user_asm("str", "sttr", "%x", __pu_val, (ptr), \
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(err), ARM64_HAS_UAO); \
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break; \
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default: \
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BUILD_BUG(); \
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} \
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uaccess_disable_not_uao(); \
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} while (0)
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#define __put_user_error(x, ptr, err) \
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do { \
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__typeof__(*(ptr)) __user *__p = (ptr); \
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might_fault(); \
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if (access_ok(__p, sizeof(*__p))) { \
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__p = uaccess_mask_ptr(__p); \
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__raw_put_user((x), __p, (err)); \
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} else { \
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(err) = -EFAULT; \
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} \
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} while (0)
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#define __put_user(x, ptr) \
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({ \
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int __pu_err = 0; \
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__put_user_error((x), (ptr), __pu_err); \
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__pu_err; \
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})
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#define put_user __put_user
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extern unsigned long __must_check __arch_copy_from_user(void *to, const void __user *from, unsigned long n);
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#define raw_copy_from_user(to, from, n) \
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({ \
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__arch_copy_from_user((to), __uaccess_mask_ptr(from), (n)); \
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})
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extern unsigned long __must_check __arch_copy_to_user(void __user *to, const void *from, unsigned long n);
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#define raw_copy_to_user(to, from, n) \
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({ \
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__arch_copy_to_user(__uaccess_mask_ptr(to), (from), (n)); \
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})
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extern unsigned long __must_check __arch_copy_in_user(void __user *to, const void __user *from, unsigned long n);
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#define raw_copy_in_user(to, from, n) \
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({ \
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__arch_copy_in_user(__uaccess_mask_ptr(to), \
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__uaccess_mask_ptr(from), (n)); \
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})
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#define INLINE_COPY_TO_USER
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#define INLINE_COPY_FROM_USER
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extern unsigned long __must_check __arch_clear_user(void __user *to, unsigned long n);
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static inline unsigned long __must_check __clear_user(void __user *to, unsigned long n)
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{
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if (access_ok(to, n))
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n = __arch_clear_user(__uaccess_mask_ptr(to), n);
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return n;
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}
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#define clear_user __clear_user
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extern long strncpy_from_user(char *dest, const char __user *src, long count);
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extern __must_check long strnlen_user(const char __user *str, long n);
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#ifdef CONFIG_ARCH_HAS_UACCESS_FLUSHCACHE
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struct page;
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void memcpy_page_flushcache(char *to, struct page *page, size_t offset, size_t len);
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extern unsigned long __must_check __copy_user_flushcache(void *to, const void __user *from, unsigned long n);
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static inline int __copy_from_user_flushcache(void *dst, const void __user *src, unsigned size)
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{
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kasan_check_write(dst, size);
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return __copy_user_flushcache(dst, __uaccess_mask_ptr(src), size);
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}
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#endif
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#endif /* __ASM_UACCESS_H */
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