mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-28 11:18:45 +07:00
043cb41a85
On strict kernel memory permission, we couldn't patch code without writable permission. Preserve two holes in fixmap area, so we can map the kernel code temporarily to fixmap area, then patch the instructions. We need two pages here because we support the compressed instruction, so the instruction might be align to 2 bytes. When patching the 32-bit length instruction which is 2 bytes alignment, it will across two pages. Introduce two interfaces to patch kernel code: riscv_patch_text_nosync: - patch code without synchronization, it's caller's responsibility to synchronize all CPUs if needed. riscv_patch_text: - patch code and always synchronize with stop_machine() Signed-off-by: Zong Li <zong.li@sifive.com> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
49 lines
1.0 KiB
Makefile
49 lines
1.0 KiB
Makefile
# SPDX-License-Identifier: GPL-2.0-only
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#
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# Makefile for the RISC-V Linux kernel
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#
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ifdef CONFIG_FTRACE
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CFLAGS_REMOVE_ftrace.o = -pg
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CFLAGS_REMOVE_patch.o = -pg
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endif
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extra-y += head.o
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extra-y += vmlinux.lds
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obj-y += cpu.o
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obj-y += cpufeature.o
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obj-y += entry.o
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obj-y += irq.o
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obj-y += process.o
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obj-y += ptrace.o
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obj-y += reset.o
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obj-y += setup.o
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obj-y += signal.o
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obj-y += syscall_table.o
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obj-y += sys_riscv.o
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obj-y += time.o
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obj-y += traps.o
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obj-y += riscv_ksyms.o
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obj-y += stacktrace.o
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obj-y += cacheinfo.o
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obj-y += patch.o
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obj-$(CONFIG_MMU) += vdso.o vdso/
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obj-$(CONFIG_RISCV_M_MODE) += clint.o
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obj-$(CONFIG_FPU) += fpu.o
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obj-$(CONFIG_SMP) += smpboot.o
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obj-$(CONFIG_SMP) += smp.o
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obj-$(CONFIG_MODULES) += module.o
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obj-$(CONFIG_MODULE_SECTIONS) += module-sections.o
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obj-$(CONFIG_FUNCTION_TRACER) += mcount.o ftrace.o
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obj-$(CONFIG_DYNAMIC_FTRACE) += mcount-dyn.o
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obj-$(CONFIG_PERF_EVENTS) += perf_event.o
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obj-$(CONFIG_PERF_EVENTS) += perf_callchain.o
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obj-$(CONFIG_HAVE_PERF_REGS) += perf_regs.o
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obj-$(CONFIG_RISCV_SBI) += sbi.o
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clean:
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