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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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1c8732bb03
Some off-chip GPIO expanders need to be communicated by I2C or SPI traffic, but may still support IRQs. By the sleeping nature of such buses, such IRQ handlers need to be threaded. Support such handlers in the gpiochip irqchip helpers by flagging IRQs as threaded if the .can_sleep property of the gpiochip is true. Helpfully deny registration of chained IRQ handlers if the .can_sleep property is set, as such chips will invariably need a nested handler rather than a chained handler. Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
238 lines
7.9 KiB
C
238 lines
7.9 KiB
C
#ifndef __LINUX_GPIO_DRIVER_H
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#define __LINUX_GPIO_DRIVER_H
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#include <linux/types.h>
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#include <linux/module.h>
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#include <linux/irq.h>
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#include <linux/irqchip/chained_irq.h>
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#include <linux/irqdomain.h>
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struct device;
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struct gpio_desc;
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struct of_phandle_args;
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struct device_node;
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struct seq_file;
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#ifdef CONFIG_GPIOLIB
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/**
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* struct gpio_chip - abstract a GPIO controller
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* @label: for diagnostics
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* @dev: optional device providing the GPIOs
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* @owner: helps prevent removal of modules exporting active GPIOs
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* @list: links gpio_chips together for traversal
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* @request: optional hook for chip-specific activation, such as
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* enabling module power and clock; may sleep
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* @free: optional hook for chip-specific deactivation, such as
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* disabling module power and clock; may sleep
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* @get_direction: returns direction for signal "offset", 0=out, 1=in,
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* (same as GPIOF_DIR_XXX), or negative error
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* @direction_input: configures signal "offset" as input, or returns error
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* @direction_output: configures signal "offset" as output, or returns error
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* @get: returns value for signal "offset"; for output signals this
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* returns either the value actually sensed, or zero
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* @set: assigns output value for signal "offset"
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* @set_debounce: optional hook for setting debounce time for specified gpio in
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* interrupt triggered gpio chips
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* @to_irq: optional hook supporting non-static gpio_to_irq() mappings;
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* implementation may not sleep
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* @dbg_show: optional routine to show contents in debugfs; default code
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* will be used when this is omitted, but custom code can show extra
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* state (such as pullup/pulldown configuration).
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* @base: identifies the first GPIO number handled by this chip; or, if
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* negative during registration, requests dynamic ID allocation.
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* @ngpio: the number of GPIOs handled by this controller; the last GPIO
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* handled is (base + ngpio - 1).
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* @desc: array of ngpio descriptors. Private.
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* @names: if set, must be an array of strings to use as alternative
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* names for the GPIOs in this chip. Any entry in the array
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* may be NULL if there is no alias for the GPIO, however the
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* array must be @ngpio entries long. A name can include a single printk
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* format specifier for an unsigned int. It is substituted by the actual
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* number of the gpio.
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* @can_sleep: flag must be set iff get()/set() methods sleep, as they
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* must while accessing GPIO expander chips over I2C or SPI. This
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* implies that if the chip supports IRQs, these IRQs need to be threaded
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* as the chip access may sleep when e.g. reading out the IRQ status
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* registers.
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* @exported: flags if the gpiochip is exported for use from sysfs. Private.
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*
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* A gpio_chip can help platforms abstract various sources of GPIOs so
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* they can all be accessed through a common programing interface.
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* Example sources would be SOC controllers, FPGAs, multifunction
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* chips, dedicated GPIO expanders, and so on.
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*
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* Each chip controls a number of signals, identified in method calls
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* by "offset" values in the range 0..(@ngpio - 1). When those signals
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* are referenced through calls like gpio_get_value(gpio), the offset
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* is calculated by subtracting @base from the gpio number.
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*/
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struct gpio_chip {
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const char *label;
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struct device *dev;
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struct module *owner;
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struct list_head list;
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int (*request)(struct gpio_chip *chip,
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unsigned offset);
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void (*free)(struct gpio_chip *chip,
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unsigned offset);
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int (*get_direction)(struct gpio_chip *chip,
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unsigned offset);
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int (*direction_input)(struct gpio_chip *chip,
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unsigned offset);
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int (*direction_output)(struct gpio_chip *chip,
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unsigned offset, int value);
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int (*get)(struct gpio_chip *chip,
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unsigned offset);
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void (*set)(struct gpio_chip *chip,
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unsigned offset, int value);
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int (*set_debounce)(struct gpio_chip *chip,
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unsigned offset,
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unsigned debounce);
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int (*to_irq)(struct gpio_chip *chip,
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unsigned offset);
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void (*dbg_show)(struct seq_file *s,
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struct gpio_chip *chip);
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int base;
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u16 ngpio;
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struct gpio_desc *desc;
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const char *const *names;
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bool can_sleep;
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bool exported;
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#ifdef CONFIG_GPIOLIB_IRQCHIP
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/*
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* With CONFIG_GPIO_IRQCHIP we get an irqchip inside the gpiolib
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* to handle IRQs for most practical cases.
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*/
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struct irq_chip *irqchip;
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struct irq_domain *irqdomain;
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unsigned int irq_base;
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irq_flow_handler_t irq_handler;
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unsigned int irq_default_type;
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#endif
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#if defined(CONFIG_OF_GPIO)
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/*
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* If CONFIG_OF is enabled, then all GPIO controllers described in the
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* device tree automatically may have an OF translation
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*/
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struct device_node *of_node;
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int of_gpio_n_cells;
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int (*of_xlate)(struct gpio_chip *gc,
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const struct of_phandle_args *gpiospec, u32 *flags);
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#endif
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#ifdef CONFIG_PINCTRL
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/*
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* If CONFIG_PINCTRL is enabled, then gpio controllers can optionally
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* describe the actual pin range which they serve in an SoC. This
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* information would be used by pinctrl subsystem to configure
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* corresponding pins for gpio usage.
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*/
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struct list_head pin_ranges;
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#endif
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};
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extern const char *gpiochip_is_requested(struct gpio_chip *chip,
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unsigned offset);
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/* add/remove chips */
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extern int gpiochip_add(struct gpio_chip *chip);
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extern int __must_check gpiochip_remove(struct gpio_chip *chip);
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extern struct gpio_chip *gpiochip_find(void *data,
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int (*match)(struct gpio_chip *chip, void *data));
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/* lock/unlock as IRQ */
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int gpiod_lock_as_irq(struct gpio_desc *desc);
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void gpiod_unlock_as_irq(struct gpio_desc *desc);
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struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc);
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struct gpio_desc *gpiochip_get_desc(struct gpio_chip *chip,
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u16 hwnum);
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enum gpio_lookup_flags {
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GPIO_ACTIVE_HIGH = (0 << 0),
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GPIO_ACTIVE_LOW = (1 << 0),
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GPIO_OPEN_DRAIN = (1 << 1),
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GPIO_OPEN_SOURCE = (1 << 2),
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};
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/**
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* struct gpiod_lookup - lookup table
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* @chip_label: name of the chip the GPIO belongs to
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* @chip_hwnum: hardware number (i.e. relative to the chip) of the GPIO
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* @con_id: name of the GPIO from the device's point of view
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* @idx: index of the GPIO in case several GPIOs share the same name
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* @flags: mask of GPIO_* values
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*
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* gpiod_lookup is a lookup table for associating GPIOs to specific devices and
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* functions using platform data.
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*/
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struct gpiod_lookup {
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const char *chip_label;
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u16 chip_hwnum;
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const char *con_id;
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unsigned int idx;
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enum gpio_lookup_flags flags;
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};
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struct gpiod_lookup_table {
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struct list_head list;
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const char *dev_id;
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struct gpiod_lookup table[];
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};
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/*
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* Simple definition of a single GPIO under a con_id
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*/
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#define GPIO_LOOKUP(_chip_label, _chip_hwnum, _con_id, _flags) \
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GPIO_LOOKUP_IDX(_chip_label, _chip_hwnum, _con_id, 0, _flags)
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/*
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* Use this macro if you need to have several GPIOs under the same con_id.
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* Each GPIO needs to use a different index and can be accessed using
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* gpiod_get_index()
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*/
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#define GPIO_LOOKUP_IDX(_chip_label, _chip_hwnum, _con_id, _idx, _flags) \
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{ \
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.chip_label = _chip_label, \
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.chip_hwnum = _chip_hwnum, \
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.con_id = _con_id, \
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.idx = _idx, \
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.flags = _flags, \
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}
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void gpiod_add_lookup_table(struct gpiod_lookup_table *table);
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#ifdef CONFIG_GPIOLIB_IRQCHIP
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void gpiochip_set_chained_irqchip(struct gpio_chip *gpiochip,
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struct irq_chip *irqchip,
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int parent_irq,
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irq_flow_handler_t parent_handler);
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int gpiochip_irqchip_add(struct gpio_chip *gpiochip,
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struct irq_chip *irqchip,
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unsigned int first_irq,
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irq_flow_handler_t handler,
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unsigned int type);
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#endif /* CONFIG_GPIO_IRQCHIP */
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#else /* CONFIG_GPIOLIB */
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static inline struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc)
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{
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/* GPIO can never have been requested */
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WARN_ON(1);
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return ERR_PTR(-ENODEV);
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}
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#endif /* CONFIG_GPIOLIB */
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#endif
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