Dave Gerlach 10b2185514 ARM: dts: am43xx: fix SLEWCTRL_FAST pinctrl binding ... According to AM437x TRM, Document SPRUHL7B, Revised December 2014, Section 7.2.1 Pad Control Registers, setting bit 19 of the pad control registers actually sets the SLEWCTRL value to slow rather than fast as the current macro indicates. Introduce a new macro, SLEWCTRL_SLOW, that sets the bit, and modify SLEWCTRL_FAST to 0 but keep it for completeness. Current users of the macro (i2c, mdio, and uart) are left unmodified as SLEWCTRL_FAST was the macro used and actual desired state. Tested on am437x-gp-evm with no difference in software performance seen. Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>		2015-03-06 09:21:03 -08:00
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am33xx.h	ARM: dts: am33xx: fix SLEWCTRL_FAST pinctrl binding	2015-03-06 09:12:56 -08:00
am43xx.h	ARM: dts: am43xx: fix SLEWCTRL_FAST pinctrl binding	2015-03-06 09:21:03 -08:00
at91.h	pinctrl: at91: add drive strength configuration	2014-09-05 10:32:06 +02:00
dra.h	pinctrl: dra: dt-bindings: Fix output pull up/down	2014-11-10 14:29:20 -08:00
nomadik.h	ARM: u8540: Add Pinctrl Device Tree settings for uart0, uart2	2013-08-06 23:48:50 +02:00
omap.h	ARM: dts: Add minimal support for dm8168-evm	2015-01-19 11:47:35 -08:00
pinctrl-tegra-xusb.h	of: Add NVIDIA Tegra XUSB pad controller binding	2014-07-11 14:40:41 +02:00
pinctrl-tegra.h	ARM: tegra: Add header file for pinctrl constants	2013-12-16 14:09:20 -07:00
qcom,pmic-gpio.h	pinctrl: Device tree bindings for Qualcomm PMIC GPIO block	2014-10-29 09:28:36 +01:00
qcom,pmic-mpp.h	pinctrl: Device tree bindings for Qualcomm PMIC MPP block	2014-10-29 09:28:36 +01:00
rockchip.h	pinctrl: Add mux options 3 and 4 for rockchip pinctrl	2014-08-28 15:18:03 +02:00
sun4i-a10.h	ARM: sunxi: DT: Convert the DTs to use a header for the pinctrl nodes	2015-01-21 09:58:57 +01:00