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This patch introduces the assembly routines to do SHA512 computation on buffers belonging to several jobs at once. The assembly routines are optimized with AVX2 instructions that have 4 data lanes and using AVX2 registers. Signed-off-by: Megha Dey <megha.dey@linux.intel.com> Reviewed-by: Fenghua Yu <fenghua.yu@intel.com> Reviewed-by: Tim Chen <tim.c.chen@linux.intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> |
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Makefile | ||
sha512_mb_ctx.h | ||
sha512_mb_mgr_datastruct.S | ||
sha512_mb_mgr_flush_avx2.S | ||
sha512_mb_mgr_init_avx2.c | ||
sha512_mb_mgr_submit_avx2.S | ||
sha512_mb_mgr.h | ||
sha512_mb.c | ||
sha512_x4_avx2.S |