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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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bb9052744f
A secondary CPU could fail to come online due to insufficient capabilities and could simply die or loop in the kernel. e.g, a CPU with no support for the selected kernel PAGE_SIZE loops in kernel with MMU turned off. or a hotplugged CPU which doesn't have one of the advertised system capability will die during the activation. There is no way to synchronise the status of the failing CPU back to the master. This patch solves the issue by adding a field to the secondary_data which can be updated by the failing CPU. If the secondary CPU fails even before turning the MMU on, it updates the status in a special variable reserved in the head.txt section to make sure that the update can be cache invalidated safely without possible sharing of cache write back granule. Here are the possible states : -1. CPU_MMU_OFF - Initial value set by the master CPU, this value indicates that the CPU could not turn the MMU on, hence the status could not be reliably updated in the secondary_data. Instead, the CPU has updated the status @ __early_cpu_boot_status. 0. CPU_BOOT_SUCCESS - CPU has booted successfully. 1. CPU_KILL_ME - CPU has invoked cpu_ops->die, indicating the master CPU to synchronise by issuing a cpu_ops->cpu_kill. 2. CPU_STUCK_IN_KERNEL - CPU couldn't invoke die(), instead is looping in the kernel. This information could be used by say, kexec to check if it is really safe to do a kexec reboot. 3. CPU_PANIC_KERNEL - CPU detected some serious issues which requires kernel to crash immediately. The secondary CPU cannot call panic() until it has initialised the GIC. This flag can be used to instruct the master to do so. Cc: Mark Rutland <mark.rutland@arm.com> Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> [catalin.marinas@arm.com: conflict resolution] [catalin.marinas@arm.com: converted "status" from int to long] [catalin.marinas@arm.com: updated update_early_cpu_boot_status to use str_l] Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
119 lines
3.0 KiB
C
119 lines
3.0 KiB
C
/*
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* Copyright (C) 2012 ARM Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __ASM_SMP_H
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#define __ASM_SMP_H
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/* Values for secondary_data.status */
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#define CPU_MMU_OFF (-1)
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#define CPU_BOOT_SUCCESS (0)
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/* The cpu invoked ops->cpu_die, synchronise it with cpu_kill */
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#define CPU_KILL_ME (1)
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/* The cpu couldn't die gracefully and is looping in the kernel */
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#define CPU_STUCK_IN_KERNEL (2)
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/* Fatal system error detected by secondary CPU, crash the system */
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#define CPU_PANIC_KERNEL (3)
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#ifndef __ASSEMBLY__
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#include <linux/threads.h>
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#include <linux/cpumask.h>
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#include <linux/thread_info.h>
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#define raw_smp_processor_id() (current_thread_info()->cpu)
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struct seq_file;
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/*
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* generate IPI list text
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*/
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extern void show_ipi_list(struct seq_file *p, int prec);
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/*
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* Called from C code, this handles an IPI.
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*/
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extern void handle_IPI(int ipinr, struct pt_regs *regs);
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/*
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* Discover the set of possible CPUs and determine their
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* SMP operations.
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*/
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extern void smp_init_cpus(void);
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/*
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* Provide a function to raise an IPI cross call on CPUs in callmap.
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*/
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extern void set_smp_cross_call(void (*)(const struct cpumask *, unsigned int));
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extern void (*__smp_cross_call)(const struct cpumask *, unsigned int);
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/*
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* Called from the secondary holding pen, this is the secondary CPU entry point.
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*/
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asmlinkage void secondary_start_kernel(void);
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/*
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* Initial data for bringing up a secondary CPU.
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* @stack - sp for the secondary CPU
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* @status - Result passed back from the secondary CPU to
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* indicate failure.
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*/
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struct secondary_data {
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void *stack;
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long status;
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};
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extern struct secondary_data secondary_data;
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extern long __early_cpu_boot_status;
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extern void secondary_entry(void);
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extern void arch_send_call_function_single_ipi(int cpu);
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extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);
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#ifdef CONFIG_ARM64_ACPI_PARKING_PROTOCOL
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extern void arch_send_wakeup_ipi_mask(const struct cpumask *mask);
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#else
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static inline void arch_send_wakeup_ipi_mask(const struct cpumask *mask)
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{
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BUILD_BUG();
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}
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#endif
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extern int __cpu_disable(void);
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extern void __cpu_die(unsigned int cpu);
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extern void cpu_die(void);
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extern void cpu_die_early(void);
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static inline void cpu_park_loop(void)
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{
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for (;;) {
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wfe();
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wfi();
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}
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}
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static inline void update_cpu_boot_status(int val)
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{
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WRITE_ONCE(secondary_data.status, val);
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/* Ensure the visibility of the status update */
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dsb(ishst);
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}
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#endif /* ifndef __ASSEMBLY__ */
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#endif /* ifndef __ASM_SMP_H */
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