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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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013de2d667
This patch adds files related to memory management and here is our memory-layout: Fixmap : 0xffc02000 – 0xfffff000 (4 MB - 12KB) Pkmap : 0xff800000 – 0xffc00000 (4 MB) Vmalloc : 0xf0200000 – 0xff000000 (238 MB) Lowmem : 0x80000000 – 0xc0000000 (1GB) abiv1 CPU (CK610) is VIPT cache and it doesn't support highmem. abiv2 CPUs are all PIPT cache and they could support highmem. Lowmem is directly mapped by msa0 & msa1 reg, and we needn't setup memory page table for it. Link:https://lore.kernel.org/lkml/20180518215548.GH17671@n2100.armlinux.org.uk/ Signed-off-by: Guo Ren <ren_guo@c-sky.com> Cc: Christoph Hellwig <hch@infradead.org> Reviewed-by: Arnd Bergmann <arnd@arndb.de>
20 lines
540 B
C
20 lines
540 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
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#ifndef __ASM_CSKY_SEGMENT_H
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#define __ASM_CSKY_SEGMENT_H
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typedef struct {
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unsigned long seg;
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} mm_segment_t;
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#define KERNEL_DS ((mm_segment_t) { 0xFFFFFFFF })
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#define get_ds() KERNEL_DS
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#define USER_DS ((mm_segment_t) { 0x80000000UL })
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#define get_fs() (current_thread_info()->addr_limit)
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#define set_fs(x) (current_thread_info()->addr_limit = (x))
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#define segment_eq(a, b) ((a).seg == (b).seg)
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#endif /* __ASM_CSKY_SEGMENT_H */
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