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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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783807436f
Add regulators coupler for Tegra30 SoCs that performs voltage balancing of a coupled regulators and thus provides voltage scaling functionality. There are 2 coupled regulators on all Tegra30 SoCs: CORE and CPU. The coupled regulator voltages shall be in a range of 300mV from each other and CORE voltage shall be higher than the CPU by N mV, where N depends on the CPU voltage. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Acked-By: Peter De Schrijver <pdeschrijver@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
318 lines
7.7 KiB
C
318 lines
7.7 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Voltage regulators coupler for NVIDIA Tegra30
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* Copyright (C) 2019 GRATE-DRIVER project
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*
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* Voltage constraints borrowed from downstream kernel sources
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* Copyright (C) 2010-2011 NVIDIA Corporation
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*/
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#define pr_fmt(fmt) "tegra voltage-coupler: " fmt
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/of.h>
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#include <linux/regulator/coupler.h>
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#include <linux/regulator/driver.h>
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#include <linux/regulator/machine.h>
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#include <soc/tegra/fuse.h>
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struct tegra_regulator_coupler {
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struct regulator_coupler coupler;
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struct regulator_dev *core_rdev;
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struct regulator_dev *cpu_rdev;
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int core_min_uV;
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};
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static inline struct tegra_regulator_coupler *
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to_tegra_coupler(struct regulator_coupler *coupler)
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{
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return container_of(coupler, struct tegra_regulator_coupler, coupler);
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}
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static int tegra30_core_limit(struct tegra_regulator_coupler *tegra,
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struct regulator_dev *core_rdev)
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{
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int core_min_uV = 0;
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int core_max_uV;
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int core_cur_uV;
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int err;
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if (tegra->core_min_uV > 0)
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return tegra->core_min_uV;
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core_cur_uV = regulator_get_voltage_rdev(core_rdev);
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if (core_cur_uV < 0)
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return core_cur_uV;
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core_max_uV = max(core_cur_uV, 1200000);
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err = regulator_check_voltage(core_rdev, &core_min_uV, &core_max_uV);
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if (err)
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return err;
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/*
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* Limit minimum CORE voltage to a value left from bootloader or,
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* if it's unreasonably low value, to the most common 1.2v or to
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* whatever maximum value defined via board's device-tree.
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*/
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tegra->core_min_uV = core_max_uV;
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pr_info("core minimum voltage limited to %duV\n", tegra->core_min_uV);
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return tegra->core_min_uV;
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}
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static int tegra30_core_cpu_limit(int cpu_uV)
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{
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if (cpu_uV < 800000)
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return 950000;
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if (cpu_uV < 900000)
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return 1000000;
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if (cpu_uV < 1000000)
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return 1100000;
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if (cpu_uV < 1100000)
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return 1200000;
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if (cpu_uV < 1250000) {
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switch (tegra_sku_info.cpu_speedo_id) {
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case 0 ... 1:
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case 4:
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case 7 ... 8:
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return 1200000;
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default:
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return 1300000;
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}
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}
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return -EINVAL;
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}
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static int tegra30_voltage_update(struct tegra_regulator_coupler *tegra,
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struct regulator_dev *cpu_rdev,
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struct regulator_dev *core_rdev)
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{
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int core_min_uV, core_max_uV = INT_MAX;
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int cpu_min_uV, cpu_max_uV = INT_MAX;
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int cpu_min_uV_consumers = 0;
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int core_min_limited_uV;
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int core_target_uV;
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int cpu_target_uV;
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int core_max_step;
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int cpu_max_step;
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int max_spread;
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int core_uV;
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int cpu_uV;
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int err;
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/*
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* CPU voltage should not got lower than 300mV from the CORE.
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* CPU voltage should stay below the CORE by 100mV+, depending
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* by the CORE voltage. This applies to all Tegra30 SoC's.
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*/
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max_spread = cpu_rdev->constraints->max_spread[0];
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cpu_max_step = cpu_rdev->constraints->max_uV_step;
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core_max_step = core_rdev->constraints->max_uV_step;
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if (!max_spread) {
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pr_err_once("cpu-core max-spread is undefined in device-tree\n");
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max_spread = 300000;
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}
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if (!cpu_max_step) {
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pr_err_once("cpu max-step is undefined in device-tree\n");
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cpu_max_step = 150000;
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}
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if (!core_max_step) {
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pr_err_once("core max-step is undefined in device-tree\n");
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core_max_step = 150000;
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}
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/*
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* The CORE voltage scaling is currently not hooked up in drivers,
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* hence we will limit the minimum CORE voltage to a reasonable value.
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* This should be good enough for the time being.
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*/
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core_min_uV = tegra30_core_limit(tegra, core_rdev);
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if (core_min_uV < 0)
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return core_min_uV;
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err = regulator_check_consumers(core_rdev, &core_min_uV, &core_max_uV,
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PM_SUSPEND_ON);
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if (err)
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return err;
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core_uV = regulator_get_voltage_rdev(core_rdev);
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if (core_uV < 0)
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return core_uV;
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cpu_min_uV = core_min_uV - max_spread;
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err = regulator_check_consumers(cpu_rdev, &cpu_min_uV, &cpu_max_uV,
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PM_SUSPEND_ON);
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if (err)
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return err;
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err = regulator_check_consumers(cpu_rdev, &cpu_min_uV_consumers,
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&cpu_max_uV, PM_SUSPEND_ON);
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if (err)
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return err;
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err = regulator_check_voltage(cpu_rdev, &cpu_min_uV, &cpu_max_uV);
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if (err)
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return err;
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cpu_uV = regulator_get_voltage_rdev(cpu_rdev);
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if (cpu_uV < 0)
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return cpu_uV;
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/*
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* CPU's regulator may not have any consumers, hence the voltage
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* must not be changed in that case because CPU simply won't
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* survive the voltage drop if it's running on a higher frequency.
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*/
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if (!cpu_min_uV_consumers)
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cpu_min_uV = cpu_uV;
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/*
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* Bootloader shall set up voltages correctly, but if it
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* happens that there is a violation, then try to fix it
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* at first.
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*/
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core_min_limited_uV = tegra30_core_cpu_limit(cpu_uV);
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if (core_min_limited_uV < 0)
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return core_min_limited_uV;
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core_min_uV = max(core_min_uV, tegra30_core_cpu_limit(cpu_min_uV));
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err = regulator_check_voltage(core_rdev, &core_min_uV, &core_max_uV);
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if (err)
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return err;
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if (core_min_limited_uV > core_uV) {
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pr_err("core voltage constraint violated: %d %d %d\n",
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core_uV, core_min_limited_uV, cpu_uV);
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goto update_core;
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}
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while (cpu_uV != cpu_min_uV || core_uV != core_min_uV) {
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if (cpu_uV < cpu_min_uV) {
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cpu_target_uV = min(cpu_uV + cpu_max_step, cpu_min_uV);
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} else {
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cpu_target_uV = max(cpu_uV - cpu_max_step, cpu_min_uV);
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cpu_target_uV = max(core_uV - max_spread, cpu_target_uV);
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}
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err = regulator_set_voltage_rdev(cpu_rdev,
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cpu_target_uV,
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cpu_max_uV,
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PM_SUSPEND_ON);
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if (err)
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return err;
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cpu_uV = cpu_target_uV;
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update_core:
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core_min_limited_uV = tegra30_core_cpu_limit(cpu_uV);
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if (core_min_limited_uV < 0)
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return core_min_limited_uV;
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core_target_uV = max(core_min_limited_uV, core_min_uV);
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if (core_uV < core_target_uV) {
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core_target_uV = min(core_target_uV, core_uV + core_max_step);
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core_target_uV = min(core_target_uV, cpu_uV + max_spread);
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} else {
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core_target_uV = max(core_target_uV, core_uV - core_max_step);
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}
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err = regulator_set_voltage_rdev(core_rdev,
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core_target_uV,
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core_max_uV,
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PM_SUSPEND_ON);
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if (err)
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return err;
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core_uV = core_target_uV;
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}
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return 0;
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}
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static int tegra30_regulator_balance_voltage(struct regulator_coupler *coupler,
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struct regulator_dev *rdev,
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suspend_state_t state)
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{
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struct tegra_regulator_coupler *tegra = to_tegra_coupler(coupler);
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struct regulator_dev *core_rdev = tegra->core_rdev;
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struct regulator_dev *cpu_rdev = tegra->cpu_rdev;
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if ((core_rdev != rdev && cpu_rdev != rdev) || state != PM_SUSPEND_ON) {
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pr_err("regulators are not coupled properly\n");
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return -EINVAL;
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}
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return tegra30_voltage_update(tegra, cpu_rdev, core_rdev);
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}
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static int tegra30_regulator_attach(struct regulator_coupler *coupler,
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struct regulator_dev *rdev)
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{
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struct tegra_regulator_coupler *tegra = to_tegra_coupler(coupler);
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struct device_node *np = rdev->dev.of_node;
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if (of_property_read_bool(np, "nvidia,tegra-core-regulator") &&
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!tegra->core_rdev) {
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tegra->core_rdev = rdev;
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return 0;
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}
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if (of_property_read_bool(np, "nvidia,tegra-cpu-regulator") &&
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!tegra->cpu_rdev) {
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tegra->cpu_rdev = rdev;
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return 0;
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}
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return -EINVAL;
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}
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static int tegra30_regulator_detach(struct regulator_coupler *coupler,
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struct regulator_dev *rdev)
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{
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struct tegra_regulator_coupler *tegra = to_tegra_coupler(coupler);
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if (tegra->core_rdev == rdev) {
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tegra->core_rdev = NULL;
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return 0;
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}
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if (tegra->cpu_rdev == rdev) {
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tegra->cpu_rdev = NULL;
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return 0;
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}
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return -EINVAL;
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}
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static struct tegra_regulator_coupler tegra30_coupler = {
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.coupler = {
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.attach_regulator = tegra30_regulator_attach,
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.detach_regulator = tegra30_regulator_detach,
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.balance_voltage = tegra30_regulator_balance_voltage,
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},
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};
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static int __init tegra_regulator_coupler_init(void)
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{
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if (!of_machine_is_compatible("nvidia,tegra30"))
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return 0;
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return regulator_coupler_register(&tegra30_coupler.coupler);
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}
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arch_initcall(tegra_regulator_coupler_init);
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