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b45f2869a7
On some SoCs(e.g. MX7ULP), GPIO clock is gatable and maybe disabled by default. Users have to make sure it's enabled before being able to access controller registers, otherwise an external abort error may occur. Let's add the optional clocks property to handle this case. For ULP GPIO clock, it includes two separate clocks: one is for GPIO controller Input/Output function clock while another is GPIO port control clock for interrupt function. Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Stefan Agner <stefan@agner.ch> Cc: linux-gpio@vger.kernel.org Cc: devicetree@vger.kernel.org Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
64 lines
2.0 KiB
Plaintext
64 lines
2.0 KiB
Plaintext
* Freescale VF610 PORT/GPIO module
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The Freescale PORT/GPIO modules are two adjacent modules providing GPIO
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functionality. Each pair serves 32 GPIOs. The VF610 has 5 instances of
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each, and each PORT module has its own interrupt.
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Required properties for GPIO node:
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- compatible : Should be "fsl,<soc>-gpio", below is supported list:
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"fsl,vf610-gpio"
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"fsl,imx7ulp-gpio"
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- reg : The first reg tuple represents the PORT module, the second tuple
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the GPIO module.
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- interrupts : Should be the port interrupt shared by all 32 pins.
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- gpio-controller : Marks the device node as a gpio controller.
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- #gpio-cells : Should be two. The first cell is the pin number and
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the second cell is used to specify the gpio polarity:
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0 = active high
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1 = active low
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- interrupt-controller: Marks the device node as an interrupt controller.
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- #interrupt-cells : Should be 2. The first cell is the GPIO number.
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The second cell bits[3:0] is used to specify trigger type and level flags:
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1 = low-to-high edge triggered.
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2 = high-to-low edge triggered.
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4 = active high level-sensitive.
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8 = active low level-sensitive.
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Optional properties:
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-clocks: Must contain an entry for each entry in clock-names.
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See common clock-bindings.txt for details.
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-clock-names: A list of clock names. For imx7ulp, it must contain
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"gpio", "port".
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Note: Each GPIO port should have an alias correctly numbered in "aliases"
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node.
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Examples:
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aliases {
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gpio0 = &gpio1;
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gpio1 = &gpio2;
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};
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gpio1: gpio@40049000 {
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compatible = "fsl,vf610-gpio";
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reg = <0x40049000 0x1000 0x400ff000 0x40>;
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interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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gpio-ranges = <&iomuxc 0 0 32>;
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};
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gpio2: gpio@4004a000 {
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compatible = "fsl,vf610-gpio";
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reg = <0x4004a000 0x1000 0x400ff040 0x40>;
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interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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gpio-ranges = <&iomuxc 0 32 32>;
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};
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