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3b6b13ede0
Add devicetree bindings for HiSilicon Hi3670 clock controller. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
44 lines
1.2 KiB
Plaintext
44 lines
1.2 KiB
Plaintext
* Hisilicon Hi3670 Clock Controller
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The Hi3670 clock controller generates and supplies clock to various
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controllers within the Hi3670 SoC.
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Required Properties:
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- compatible: the compatible should be one of the following strings to
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indicate the clock controller functionality.
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- "hisilicon,hi3670-crgctrl"
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- "hisilicon,hi3670-pctrl"
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- "hisilicon,hi3670-pmuctrl"
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- "hisilicon,hi3670-sctrl"
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- "hisilicon,hi3670-iomcu"
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- "hisilicon,hi3670-media1-crg"
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- "hisilicon,hi3670-media2-crg"
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- reg: physical base address of the controller and length of memory mapped
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region.
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- #clock-cells: should be 1.
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Each clock is assigned an identifier and client nodes use this identifier
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to specify the clock which they consume.
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All these identifier could be found in <dt-bindings/clock/hi3670-clock.h>.
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Examples:
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crg_ctrl: clock-controller@fff35000 {
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compatible = "hisilicon,hi3670-crgctrl", "syscon";
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reg = <0x0 0xfff35000 0x0 0x1000>;
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#clock-cells = <1>;
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};
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uart0: serial@fdf02000 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0x0 0xfdf02000 0x0 0x1000>;
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interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&crg_ctrl HI3670_CLK_GATE_UART0>,
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<&crg_ctrl HI3670_PCLK>;
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clock-names = "uartclk", "apb_pclk";
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};
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