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02b485e31d
Acquiring the reset GPIO low means that reset is being deasserted, this
is followed almost immediately with qcom_pcie_host_init() asserting it,
initializing it and then finally deasserting it again, for the link to
come up.
Some PCIe devices requires a minimum time between the initial deassert
and subsequent reset cycles. In a platform that boots with the reset
GPIO asserted this requirement is being violated by this deassert/assert
pulse.
Acquire the reset GPIO high to prevent this situation by matching the
state to the subsequent asserted state.
Fixes:
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.. | ||
Kconfig | ||
Makefile | ||
pci-dra7xx.c | ||
pci-exynos.c | ||
pci-imx6.c | ||
pci-keystone.c | ||
pci-layerscape.c | ||
pci-meson.c | ||
pcie-armada8k.c | ||
pcie-artpec6.c | ||
pcie-designware-ep.c | ||
pcie-designware-host.c | ||
pcie-designware-plat.c | ||
pcie-designware.c | ||
pcie-designware.h | ||
pcie-hisi.c | ||
pcie-histb.c | ||
pcie-kirin.c | ||
pcie-qcom.c | ||
pcie-spear13xx.c | ||
pcie-uniphier.c |