mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-25 00:20:53 +07:00
390a0c62c2
Currently, we have two different implementation of rwsem: 1) CONFIG_RWSEM_GENERIC_SPINLOCK (rwsem-spinlock.c) 2) CONFIG_RWSEM_XCHGADD_ALGORITHM (rwsem-xadd.c) As we are going to use a single generic implementation for rwsem-xadd.c and no architecture-specific code will be needed, there is no point in keeping two different implementations of rwsem. In most cases, the performance of rwsem-spinlock.c will be worse. It also doesn't get all the performance tuning and optimizations that had been implemented in rwsem-xadd.c over the years. For simplication, we are going to remove rwsem-spinlock.c and make all architectures use a single implementation of rwsem - rwsem-xadd.c. All references to RWSEM_GENERIC_SPINLOCK and RWSEM_XCHGADD_ALGORITHM in the code are removed. Suggested-by: Peter Zijlstra <peterz@infradead.org> Signed-off-by: Waiman Long <longman@redhat.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Acked-by: Linus Torvalds <torvalds@linux-foundation.org> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Borislav Petkov <bp@alien8.de> Cc: Davidlohr Bueso <dave@stgolabs.net> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Paul E. McKenney <paulmck@linux.vnet.ibm.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Tim Chen <tim.c.chen@linux.intel.com> Cc: Will Deacon <will.deacon@arm.com> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-c6x-dev@linux-c6x.org Cc: linux-m68k@lists.linux-m68k.org Cc: linux-riscv@lists.infradead.org Cc: linux-um@lists.infradead.org Cc: linux-xtensa@linux-xtensa.org Cc: linuxppc-dev@lists.ozlabs.org Cc: nios2-dev@lists.rocketboards.org Cc: openrisc@lists.librecores.org Cc: uclinux-h8-devel@lists.sourceforge.jp Link: https://lkml.kernel.org/r/20190322143008.21313-3-longman@redhat.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
227 lines
4.4 KiB
Plaintext
227 lines
4.4 KiB
Plaintext
config CSKY
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def_bool y
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select ARCH_32BIT_OFF_T
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select ARCH_HAS_SYNC_DMA_FOR_CPU
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select ARCH_HAS_SYNC_DMA_FOR_DEVICE
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select ARCH_USE_BUILTIN_BSWAP
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select ARCH_USE_QUEUED_RWLOCKS if NR_CPUS>2
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select COMMON_CLK
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select CLKSRC_MMIO
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select CLKSRC_OF
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select DMA_DIRECT_REMAP
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select IRQ_DOMAIN
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select HANDLE_DOMAIN_IRQ
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select DW_APB_TIMER_OF
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select GENERIC_LIB_ASHLDI3
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select GENERIC_LIB_ASHRDI3
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select GENERIC_LIB_LSHRDI3
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select GENERIC_LIB_MULDI3
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select GENERIC_LIB_CMPDI2
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select GENERIC_LIB_UCMPDI2
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select GENERIC_ALLOCATOR
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select GENERIC_ATOMIC64
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select GENERIC_CLOCKEVENTS
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select GENERIC_CPU_DEVICES
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select GENERIC_IRQ_CHIP
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select GENERIC_IRQ_PROBE
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select GENERIC_IRQ_SHOW
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select GENERIC_IRQ_MULTI_HANDLER
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select GENERIC_SCHED_CLOCK
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select GENERIC_SMP_IDLE_THREAD
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select HAVE_ARCH_TRACEHOOK
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select HAVE_FUNCTION_TRACER
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select HAVE_FUNCTION_GRAPH_TRACER
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select HAVE_KERNEL_GZIP
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select HAVE_KERNEL_LZO
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select HAVE_KERNEL_LZMA
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select HAVE_PERF_EVENTS
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select HAVE_C_RECORDMCOUNT
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select HAVE_DMA_API_DEBUG
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select HAVE_DMA_CONTIGUOUS
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select MAY_HAVE_SPARSE_IRQ
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select MODULES_USE_ELF_RELA if MODULES
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select OF
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select OF_EARLY_FLATTREE
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select PERF_USE_VMALLOC if CPU_CK610
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select RTC_LIB
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select TIMER_OF
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select USB_ARCH_HAS_EHCI
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select USB_ARCH_HAS_OHCI
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config CPU_HAS_CACHEV2
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bool
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config CPU_HAS_FPUV2
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bool
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config CPU_HAS_HILO
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bool
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config CPU_HAS_TLBI
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bool
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config CPU_HAS_LDSTEX
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bool
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help
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For SMP, CPU needs "ldex&stex" instrcutions to atomic operations.
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config CPU_NEED_TLBSYNC
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bool
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config CPU_NEED_SOFTALIGN
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bool
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config CPU_NO_USER_BKPT
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bool
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help
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For abiv2 we couldn't use "trap 1" as user space bkpt in gdbserver, because
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abiv2 is 16/32bit instruction set and "trap 1" is 32bit.
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So we need a 16bit instruction as user space bkpt, and it will cause an illegal
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instruction exception.
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In kernel we parse the *regs->pc to determine whether to send SIGTRAP or not.
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config GENERIC_CALIBRATE_DELAY
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def_bool y
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config GENERIC_CSUM
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def_bool y
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config GENERIC_HWEIGHT
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def_bool y
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config MMU
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def_bool y
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config STACKTRACE_SUPPORT
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def_bool y
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config TIME_LOW_RES
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def_bool y
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config TRACE_IRQFLAGS_SUPPORT
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def_bool y
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config CPU_TLB_SIZE
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int
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default "128" if (CPU_CK610 || CPU_CK807 || CPU_CK810)
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default "1024" if (CPU_CK860)
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config CPU_ASID_BITS
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int
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default "8" if (CPU_CK610 || CPU_CK807 || CPU_CK810)
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default "12" if (CPU_CK860)
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config L1_CACHE_SHIFT
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int
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default "4" if (CPU_CK610)
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default "5" if (CPU_CK807 || CPU_CK810)
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default "6" if (CPU_CK860)
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menu "Processor type and features"
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choice
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prompt "CPU MODEL"
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default CPU_CK807
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config CPU_CK610
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bool "CSKY CPU ck610"
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select CPU_NEED_TLBSYNC
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select CPU_NEED_SOFTALIGN
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select CPU_NO_USER_BKPT
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config CPU_CK810
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bool "CSKY CPU ck810"
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select CPU_HAS_HILO
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select CPU_NEED_TLBSYNC
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config CPU_CK807
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bool "CSKY CPU ck807"
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select CPU_HAS_HILO
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config CPU_CK860
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bool "CSKY CPU ck860"
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select CPU_HAS_TLBI
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select CPU_HAS_CACHEV2
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select CPU_HAS_LDSTEX
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select CPU_HAS_FPUV2
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endchoice
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choice
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prompt "C-SKY PMU type"
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depends on PERF_EVENTS
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depends on CPU_CK807 || CPU_CK810 || CPU_CK860
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config CPU_PMU_NONE
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bool "None"
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config CSKY_PMU_V1
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bool "Performance Monitoring Unit Ver.1"
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endchoice
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choice
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prompt "Power Manager Instruction (wait/doze/stop)"
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default CPU_PM_NONE
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config CPU_PM_NONE
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bool "None"
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config CPU_PM_WAIT
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bool "wait"
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config CPU_PM_DOZE
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bool "doze"
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config CPU_PM_STOP
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bool "stop"
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endchoice
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config CPU_HAS_VDSP
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bool "CPU has VDSP coprocessor"
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depends on CPU_HAS_FPU && CPU_HAS_FPUV2
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config CPU_HAS_FPU
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bool "CPU has FPU coprocessor"
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depends on CPU_CK807 || CPU_CK810 || CPU_CK860
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config CPU_HAS_TEE
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bool "CPU has Trusted Execution Environment"
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depends on CPU_CK810
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config SMP
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bool "Symmetric Multi-Processing (SMP) support for C-SKY"
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depends on CPU_CK860
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default n
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config NR_CPUS
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int "Maximum number of CPUs (2-32)"
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range 2 32
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depends on SMP
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default "2"
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config HIGHMEM
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bool "High Memory Support"
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depends on !CPU_CK610
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default y
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config FORCE_MAX_ZONEORDER
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int "Maximum zone order"
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default "11"
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config RAM_BASE
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hex "DRAM start addr (the same with memory-section in dts)"
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default 0x0
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config HOTPLUG_CPU
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bool "Support for hot-pluggable CPUs"
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select GENERIC_IRQ_MIGRATION
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depends on SMP
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help
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Say Y here to allow turning CPUs off and on. CPUs can be
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controlled through /sys/devices/system/cpu/cpu1/hotplug/target.
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Say N if you want to disable CPU hotplug.
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endmenu
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source "kernel/Kconfig.hz"
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