mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-05 09:46:43 +07:00
9e74a6b898
Newer s390 models have a breaking-event-address-recording register. Each time an instruction causes a break in the sequential instruction execution, the address is saved in that hardware register. On a program interrupt the address is copied to the lowcore address 272-279, which makes it software accessible. This patch changes the program check handler and the stack overflow checker to copy the value into the pt_regs argument. The oops output is enhanced to show the last known breaking address. It might give additional information if the stack trace is corrupted. The feature is only available on 64 bit. The new oops output looks like: [---------snip----------] Modules linked in: vmcp sunrpc qeth_l2 dm_mod qeth ccwgroup CPU: 2 Not tainted 2.6.24zlive-host #8 Process modprobe (pid: 4788, task: 00000000bf3d8718, ksp: 00000000b2b0b8e0) Krnl PSW : 0704200180000000 000003e000020028 (vmcp_init+0x28/0xe4 [vmcp]) R:0 T:1 IO:1 EX:1 Key:0 M:1 W:0 P:0 AS:0 CC:2 PM:0 EA:3 Krnl GPRS: 0000000004000002 000003e000020000 0000000000000000 0000000000000001 000000000015734c ffffffffffffffff 000003e0000b3b00 0000000000000000 000003e00007ca30 00000000b5bb5d40 00000000b5bb5800 000003e0000b3b00 000003e0000a2000 00000000003ecf50 00000000b2b0bd50 00000000b2b0bcb0 Krnl Code: 000003e000020018: c0c000040ff4 larl %r12,3e0000a2000 000003e00002001e: e3e0f0000024 stg %r14,0(%r15) 000003e000020024: a7f40001 brc 15,3e000020026 >000003e000020028: e310c0100004 lg %r1,16(%r12) 000003e00002002e: c020000413dc larl %r2,3e0000a27e6 000003e000020034: c0a00004aee6 larl %r10,3e0000b5e00 000003e00002003a: a7490001 lghi %r4,1 000003e00002003e: a75900f0 lghi %r5,240 Call Trace: ([<000000000014b300>] blocking_notifier_call_chain+0x2c/0x40) [<000000000015735c>] sys_init_module+0x19d8/0x1b08 [<0000000000110afc>] sysc_noemu+0x10/0x16 [<000002000011cda2>] 0x2000011cda2 Last Breaking-Event-Address: [<000003e000020024>] vmcp_init+0x24/0xe4 [vmcp] [---------snip----------] Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com> Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
748 lines
22 KiB
C
748 lines
22 KiB
C
/*
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* arch/s390/kernel/traps.c
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*
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* S390 version
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* Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
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* Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
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* Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
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*
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* Derived from "arch/i386/kernel/traps.c"
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* Copyright (C) 1991, 1992 Linus Torvalds
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*/
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/*
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* 'Traps.c' handles hardware traps and faults after we have saved some
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* state in 'asm.s'.
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*/
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#include <linux/sched.h>
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#include <linux/kernel.h>
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#include <linux/string.h>
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#include <linux/errno.h>
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#include <linux/ptrace.h>
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#include <linux/timer.h>
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#include <linux/mm.h>
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#include <linux/smp.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/seq_file.h>
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#include <linux/delay.h>
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#include <linux/module.h>
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#include <linux/kdebug.h>
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#include <linux/kallsyms.h>
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#include <linux/reboot.h>
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#include <linux/kprobes.h>
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#include <linux/bug.h>
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#include <linux/utsname.h>
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#include <asm/system.h>
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#include <asm/uaccess.h>
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#include <asm/io.h>
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#include <asm/atomic.h>
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#include <asm/mathemu.h>
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#include <asm/cpcmd.h>
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#include <asm/s390_ext.h>
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#include <asm/lowcore.h>
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#include <asm/debug.h>
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#include "entry.h"
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pgm_check_handler_t *pgm_check_table[128];
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#ifdef CONFIG_SYSCTL
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#ifdef CONFIG_PROCESS_DEBUG
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int sysctl_userprocess_debug = 1;
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#else
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int sysctl_userprocess_debug = 0;
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#endif
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#endif
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extern pgm_check_handler_t do_protection_exception;
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extern pgm_check_handler_t do_dat_exception;
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extern pgm_check_handler_t do_asce_exception;
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#define stack_pointer ({ void **sp; asm("la %0,0(15)" : "=&d" (sp)); sp; })
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#ifndef CONFIG_64BIT
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#define FOURLONG "%08lx %08lx %08lx %08lx\n"
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static int kstack_depth_to_print = 12;
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#else /* CONFIG_64BIT */
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#define FOURLONG "%016lx %016lx %016lx %016lx\n"
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static int kstack_depth_to_print = 20;
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#endif /* CONFIG_64BIT */
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/*
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* For show_trace we have tree different stack to consider:
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* - the panic stack which is used if the kernel stack has overflown
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* - the asynchronous interrupt stack (cpu related)
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* - the synchronous kernel stack (process related)
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* The stack trace can start at any of the three stack and can potentially
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* touch all of them. The order is: panic stack, async stack, sync stack.
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*/
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static unsigned long
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__show_trace(unsigned long sp, unsigned long low, unsigned long high)
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{
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struct stack_frame *sf;
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struct pt_regs *regs;
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while (1) {
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sp = sp & PSW_ADDR_INSN;
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if (sp < low || sp > high - sizeof(*sf))
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return sp;
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sf = (struct stack_frame *) sp;
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printk("([<%016lx>] ", sf->gprs[8] & PSW_ADDR_INSN);
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print_symbol("%s)\n", sf->gprs[8] & PSW_ADDR_INSN);
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/* Follow the backchain. */
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while (1) {
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low = sp;
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sp = sf->back_chain & PSW_ADDR_INSN;
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if (!sp)
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break;
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if (sp <= low || sp > high - sizeof(*sf))
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return sp;
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sf = (struct stack_frame *) sp;
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printk(" [<%016lx>] ", sf->gprs[8] & PSW_ADDR_INSN);
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print_symbol("%s\n", sf->gprs[8] & PSW_ADDR_INSN);
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}
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/* Zero backchain detected, check for interrupt frame. */
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sp = (unsigned long) (sf + 1);
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if (sp <= low || sp > high - sizeof(*regs))
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return sp;
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regs = (struct pt_regs *) sp;
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printk(" [<%016lx>] ", regs->psw.addr & PSW_ADDR_INSN);
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print_symbol("%s\n", regs->psw.addr & PSW_ADDR_INSN);
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low = sp;
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sp = regs->gprs[15];
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}
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}
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void show_trace(struct task_struct *task, unsigned long *stack)
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{
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register unsigned long __r15 asm ("15");
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unsigned long sp;
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sp = (unsigned long) stack;
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if (!sp)
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sp = task ? task->thread.ksp : __r15;
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printk("Call Trace:\n");
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#ifdef CONFIG_CHECK_STACK
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sp = __show_trace(sp, S390_lowcore.panic_stack - 4096,
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S390_lowcore.panic_stack);
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#endif
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sp = __show_trace(sp, S390_lowcore.async_stack - ASYNC_SIZE,
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S390_lowcore.async_stack);
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if (task)
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__show_trace(sp, (unsigned long) task_stack_page(task),
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(unsigned long) task_stack_page(task) + THREAD_SIZE);
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else
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__show_trace(sp, S390_lowcore.thread_info,
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S390_lowcore.thread_info + THREAD_SIZE);
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if (!task)
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task = current;
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debug_show_held_locks(task);
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}
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void show_stack(struct task_struct *task, unsigned long *sp)
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{
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register unsigned long * __r15 asm ("15");
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unsigned long *stack;
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int i;
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if (!sp)
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stack = task ? (unsigned long *) task->thread.ksp : __r15;
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else
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stack = sp;
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for (i = 0; i < kstack_depth_to_print; i++) {
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if (((addr_t) stack & (THREAD_SIZE-1)) == 0)
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break;
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if (i && ((i * sizeof (long) % 32) == 0))
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printk("\n ");
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printk("%p ", (void *)*stack++);
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}
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printk("\n");
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show_trace(task, sp);
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}
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#ifdef CONFIG_64BIT
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void show_last_breaking_event(struct pt_regs *regs)
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{
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printk("Last Breaking-Event-Address:\n");
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printk(" [<%016lx>] ", regs->args[0] & PSW_ADDR_INSN);
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print_symbol("%s\n", regs->args[0] & PSW_ADDR_INSN);
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}
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#endif
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/*
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* The architecture-independent dump_stack generator
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*/
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void dump_stack(void)
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{
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printk("CPU: %d %s %s %.*s\n",
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task_thread_info(current)->cpu, print_tainted(),
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init_utsname()->release,
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(int)strcspn(init_utsname()->version, " "),
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init_utsname()->version);
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printk("Process %s (pid: %d, task: %p, ksp: %p)\n",
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current->comm, current->pid, current,
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(void *) current->thread.ksp);
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show_stack(NULL, NULL);
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}
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EXPORT_SYMBOL(dump_stack);
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static inline int mask_bits(struct pt_regs *regs, unsigned long bits)
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{
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return (regs->psw.mask & bits) / ((~bits + 1) & bits);
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}
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void show_registers(struct pt_regs *regs)
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{
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char *mode;
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mode = (regs->psw.mask & PSW_MASK_PSTATE) ? "User" : "Krnl";
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printk("%s PSW : %p %p",
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mode, (void *) regs->psw.mask,
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(void *) regs->psw.addr);
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print_symbol(" (%s)\n", regs->psw.addr & PSW_ADDR_INSN);
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printk(" R:%x T:%x IO:%x EX:%x Key:%x M:%x W:%x "
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"P:%x AS:%x CC:%x PM:%x", mask_bits(regs, PSW_MASK_PER),
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mask_bits(regs, PSW_MASK_DAT), mask_bits(regs, PSW_MASK_IO),
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mask_bits(regs, PSW_MASK_EXT), mask_bits(regs, PSW_MASK_KEY),
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mask_bits(regs, PSW_MASK_MCHECK), mask_bits(regs, PSW_MASK_WAIT),
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mask_bits(regs, PSW_MASK_PSTATE), mask_bits(regs, PSW_MASK_ASC),
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mask_bits(regs, PSW_MASK_CC), mask_bits(regs, PSW_MASK_PM));
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#ifdef CONFIG_64BIT
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printk(" EA:%x", mask_bits(regs, PSW_BASE_BITS));
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#endif
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printk("\n%s GPRS: " FOURLONG, mode,
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regs->gprs[0], regs->gprs[1], regs->gprs[2], regs->gprs[3]);
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printk(" " FOURLONG,
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regs->gprs[4], regs->gprs[5], regs->gprs[6], regs->gprs[7]);
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printk(" " FOURLONG,
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regs->gprs[8], regs->gprs[9], regs->gprs[10], regs->gprs[11]);
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printk(" " FOURLONG,
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regs->gprs[12], regs->gprs[13], regs->gprs[14], regs->gprs[15]);
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show_code(regs);
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}
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/* This is called from fs/proc/array.c */
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void task_show_regs(struct seq_file *m, struct task_struct *task)
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{
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struct pt_regs *regs;
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regs = task_pt_regs(task);
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seq_printf(m, "task: %p, ksp: %p\n",
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task, (void *)task->thread.ksp);
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seq_printf(m, "User PSW : %p %p\n",
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(void *) regs->psw.mask, (void *)regs->psw.addr);
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seq_printf(m, "User GPRS: " FOURLONG,
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regs->gprs[0], regs->gprs[1],
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regs->gprs[2], regs->gprs[3]);
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seq_printf(m, " " FOURLONG,
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regs->gprs[4], regs->gprs[5],
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regs->gprs[6], regs->gprs[7]);
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seq_printf(m, " " FOURLONG,
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regs->gprs[8], regs->gprs[9],
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regs->gprs[10], regs->gprs[11]);
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seq_printf(m, " " FOURLONG,
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regs->gprs[12], regs->gprs[13],
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regs->gprs[14], regs->gprs[15]);
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seq_printf(m, "User ACRS: %08x %08x %08x %08x\n",
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task->thread.acrs[0], task->thread.acrs[1],
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task->thread.acrs[2], task->thread.acrs[3]);
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seq_printf(m, " %08x %08x %08x %08x\n",
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task->thread.acrs[4], task->thread.acrs[5],
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task->thread.acrs[6], task->thread.acrs[7]);
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seq_printf(m, " %08x %08x %08x %08x\n",
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task->thread.acrs[8], task->thread.acrs[9],
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task->thread.acrs[10], task->thread.acrs[11]);
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seq_printf(m, " %08x %08x %08x %08x\n",
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task->thread.acrs[12], task->thread.acrs[13],
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task->thread.acrs[14], task->thread.acrs[15]);
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}
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static DEFINE_SPINLOCK(die_lock);
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void die(const char * str, struct pt_regs * regs, long err)
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{
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static int die_counter;
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oops_enter();
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debug_stop_all();
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console_verbose();
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spin_lock_irq(&die_lock);
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bust_spinlocks(1);
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printk("%s: %04lx [#%d] ", str, err & 0xffff, ++die_counter);
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#ifdef CONFIG_PREEMPT
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printk("PREEMPT ");
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#endif
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#ifdef CONFIG_SMP
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printk("SMP ");
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#endif
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#ifdef CONFIG_DEBUG_PAGEALLOC
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printk("DEBUG_PAGEALLOC");
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#endif
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printk("\n");
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notify_die(DIE_OOPS, str, regs, err, current->thread.trap_no, SIGSEGV);
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show_regs(regs);
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bust_spinlocks(0);
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add_taint(TAINT_DIE);
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spin_unlock_irq(&die_lock);
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if (in_interrupt())
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panic("Fatal exception in interrupt");
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if (panic_on_oops)
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panic("Fatal exception: panic_on_oops");
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oops_exit();
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do_exit(SIGSEGV);
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}
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static void inline
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report_user_fault(long interruption_code, struct pt_regs *regs)
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{
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#if defined(CONFIG_SYSCTL)
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if (!sysctl_userprocess_debug)
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return;
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#endif
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#if defined(CONFIG_SYSCTL) || defined(CONFIG_PROCESS_DEBUG)
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printk("User process fault: interruption code 0x%lX\n",
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interruption_code);
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show_regs(regs);
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#endif
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}
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int is_valid_bugaddr(unsigned long addr)
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{
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return 1;
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}
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static void __kprobes inline do_trap(long interruption_code, int signr,
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char *str, struct pt_regs *regs,
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siginfo_t *info)
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{
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/*
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* We got all needed information from the lowcore and can
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* now safely switch on interrupts.
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*/
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if (regs->psw.mask & PSW_MASK_PSTATE)
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local_irq_enable();
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if (notify_die(DIE_TRAP, str, regs, interruption_code,
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interruption_code, signr) == NOTIFY_STOP)
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return;
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if (regs->psw.mask & PSW_MASK_PSTATE) {
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struct task_struct *tsk = current;
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tsk->thread.trap_no = interruption_code & 0xffff;
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force_sig_info(signr, info, tsk);
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report_user_fault(interruption_code, regs);
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} else {
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const struct exception_table_entry *fixup;
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fixup = search_exception_tables(regs->psw.addr & PSW_ADDR_INSN);
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if (fixup)
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regs->psw.addr = fixup->fixup | PSW_ADDR_AMODE;
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else {
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enum bug_trap_type btt;
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btt = report_bug(regs->psw.addr & PSW_ADDR_INSN, regs);
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if (btt == BUG_TRAP_TYPE_WARN)
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return;
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die(str, regs, interruption_code);
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}
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}
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}
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static inline void __user *get_check_address(struct pt_regs *regs)
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{
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return (void __user *)((regs->psw.addr-S390_lowcore.pgm_ilc) & PSW_ADDR_INSN);
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}
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void __kprobes do_single_step(struct pt_regs *regs)
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{
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if (notify_die(DIE_SSTEP, "sstep", regs, 0, 0,
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SIGTRAP) == NOTIFY_STOP){
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return;
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}
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if ((current->ptrace & PT_PTRACED) != 0)
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force_sig(SIGTRAP, current);
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}
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static void default_trap_handler(struct pt_regs * regs, long interruption_code)
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{
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if (regs->psw.mask & PSW_MASK_PSTATE) {
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local_irq_enable();
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do_exit(SIGSEGV);
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report_user_fault(interruption_code, regs);
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} else
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die("Unknown program exception", regs, interruption_code);
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}
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#define DO_ERROR_INFO(signr, str, name, sicode, siaddr) \
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static void name(struct pt_regs * regs, long interruption_code) \
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{ \
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siginfo_t info; \
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info.si_signo = signr; \
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info.si_errno = 0; \
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info.si_code = sicode; \
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info.si_addr = siaddr; \
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do_trap(interruption_code, signr, str, regs, &info); \
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}
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DO_ERROR_INFO(SIGILL, "addressing exception", addressing_exception,
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ILL_ILLADR, get_check_address(regs))
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DO_ERROR_INFO(SIGILL, "execute exception", execute_exception,
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ILL_ILLOPN, get_check_address(regs))
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DO_ERROR_INFO(SIGFPE, "fixpoint divide exception", divide_exception,
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FPE_INTDIV, get_check_address(regs))
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DO_ERROR_INFO(SIGFPE, "fixpoint overflow exception", overflow_exception,
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FPE_INTOVF, get_check_address(regs))
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DO_ERROR_INFO(SIGFPE, "HFP overflow exception", hfp_overflow_exception,
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FPE_FLTOVF, get_check_address(regs))
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DO_ERROR_INFO(SIGFPE, "HFP underflow exception", hfp_underflow_exception,
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FPE_FLTUND, get_check_address(regs))
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DO_ERROR_INFO(SIGFPE, "HFP significance exception", hfp_significance_exception,
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FPE_FLTRES, get_check_address(regs))
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DO_ERROR_INFO(SIGFPE, "HFP divide exception", hfp_divide_exception,
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FPE_FLTDIV, get_check_address(regs))
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DO_ERROR_INFO(SIGFPE, "HFP square root exception", hfp_sqrt_exception,
|
|
FPE_FLTINV, get_check_address(regs))
|
|
DO_ERROR_INFO(SIGILL, "operand exception", operand_exception,
|
|
ILL_ILLOPN, get_check_address(regs))
|
|
DO_ERROR_INFO(SIGILL, "privileged operation", privileged_op,
|
|
ILL_PRVOPC, get_check_address(regs))
|
|
DO_ERROR_INFO(SIGILL, "special operation exception", special_op_exception,
|
|
ILL_ILLOPN, get_check_address(regs))
|
|
DO_ERROR_INFO(SIGILL, "translation exception", translation_exception,
|
|
ILL_ILLOPN, get_check_address(regs))
|
|
|
|
static inline void
|
|
do_fp_trap(struct pt_regs *regs, void __user *location,
|
|
int fpc, long interruption_code)
|
|
{
|
|
siginfo_t si;
|
|
|
|
si.si_signo = SIGFPE;
|
|
si.si_errno = 0;
|
|
si.si_addr = location;
|
|
si.si_code = 0;
|
|
/* FPC[2] is Data Exception Code */
|
|
if ((fpc & 0x00000300) == 0) {
|
|
/* bits 6 and 7 of DXC are 0 iff IEEE exception */
|
|
if (fpc & 0x8000) /* invalid fp operation */
|
|
si.si_code = FPE_FLTINV;
|
|
else if (fpc & 0x4000) /* div by 0 */
|
|
si.si_code = FPE_FLTDIV;
|
|
else if (fpc & 0x2000) /* overflow */
|
|
si.si_code = FPE_FLTOVF;
|
|
else if (fpc & 0x1000) /* underflow */
|
|
si.si_code = FPE_FLTUND;
|
|
else if (fpc & 0x0800) /* inexact */
|
|
si.si_code = FPE_FLTRES;
|
|
}
|
|
current->thread.ieee_instruction_pointer = (addr_t) location;
|
|
do_trap(interruption_code, SIGFPE,
|
|
"floating point exception", regs, &si);
|
|
}
|
|
|
|
static void illegal_op(struct pt_regs * regs, long interruption_code)
|
|
{
|
|
siginfo_t info;
|
|
__u8 opcode[6];
|
|
__u16 __user *location;
|
|
int signal = 0;
|
|
|
|
location = get_check_address(regs);
|
|
|
|
/*
|
|
* We got all needed information from the lowcore and can
|
|
* now safely switch on interrupts.
|
|
*/
|
|
if (regs->psw.mask & PSW_MASK_PSTATE)
|
|
local_irq_enable();
|
|
|
|
if (regs->psw.mask & PSW_MASK_PSTATE) {
|
|
if (get_user(*((__u16 *) opcode), (__u16 __user *) location))
|
|
return;
|
|
if (*((__u16 *) opcode) == S390_BREAKPOINT_U16) {
|
|
if (current->ptrace & PT_PTRACED)
|
|
force_sig(SIGTRAP, current);
|
|
else
|
|
signal = SIGILL;
|
|
#ifdef CONFIG_MATHEMU
|
|
} else if (opcode[0] == 0xb3) {
|
|
if (get_user(*((__u16 *) (opcode+2)), location+1))
|
|
return;
|
|
signal = math_emu_b3(opcode, regs);
|
|
} else if (opcode[0] == 0xed) {
|
|
if (get_user(*((__u32 *) (opcode+2)),
|
|
(__u32 __user *)(location+1)))
|
|
return;
|
|
signal = math_emu_ed(opcode, regs);
|
|
} else if (*((__u16 *) opcode) == 0xb299) {
|
|
if (get_user(*((__u16 *) (opcode+2)), location+1))
|
|
return;
|
|
signal = math_emu_srnm(opcode, regs);
|
|
} else if (*((__u16 *) opcode) == 0xb29c) {
|
|
if (get_user(*((__u16 *) (opcode+2)), location+1))
|
|
return;
|
|
signal = math_emu_stfpc(opcode, regs);
|
|
} else if (*((__u16 *) opcode) == 0xb29d) {
|
|
if (get_user(*((__u16 *) (opcode+2)), location+1))
|
|
return;
|
|
signal = math_emu_lfpc(opcode, regs);
|
|
#endif
|
|
} else
|
|
signal = SIGILL;
|
|
} else {
|
|
/*
|
|
* If we get an illegal op in kernel mode, send it through the
|
|
* kprobes notifier. If kprobes doesn't pick it up, SIGILL
|
|
*/
|
|
if (notify_die(DIE_BPT, "bpt", regs, interruption_code,
|
|
3, SIGTRAP) != NOTIFY_STOP)
|
|
signal = SIGILL;
|
|
}
|
|
|
|
#ifdef CONFIG_MATHEMU
|
|
if (signal == SIGFPE)
|
|
do_fp_trap(regs, location,
|
|
current->thread.fp_regs.fpc, interruption_code);
|
|
else if (signal == SIGSEGV) {
|
|
info.si_signo = signal;
|
|
info.si_errno = 0;
|
|
info.si_code = SEGV_MAPERR;
|
|
info.si_addr = (void __user *) location;
|
|
do_trap(interruption_code, signal,
|
|
"user address fault", regs, &info);
|
|
} else
|
|
#endif
|
|
if (signal) {
|
|
info.si_signo = signal;
|
|
info.si_errno = 0;
|
|
info.si_code = ILL_ILLOPC;
|
|
info.si_addr = (void __user *) location;
|
|
do_trap(interruption_code, signal,
|
|
"illegal operation", regs, &info);
|
|
}
|
|
}
|
|
|
|
|
|
#ifdef CONFIG_MATHEMU
|
|
asmlinkage void
|
|
specification_exception(struct pt_regs * regs, long interruption_code)
|
|
{
|
|
__u8 opcode[6];
|
|
__u16 __user *location = NULL;
|
|
int signal = 0;
|
|
|
|
location = (__u16 __user *) get_check_address(regs);
|
|
|
|
/*
|
|
* We got all needed information from the lowcore and can
|
|
* now safely switch on interrupts.
|
|
*/
|
|
if (regs->psw.mask & PSW_MASK_PSTATE)
|
|
local_irq_enable();
|
|
|
|
if (regs->psw.mask & PSW_MASK_PSTATE) {
|
|
get_user(*((__u16 *) opcode), location);
|
|
switch (opcode[0]) {
|
|
case 0x28: /* LDR Rx,Ry */
|
|
signal = math_emu_ldr(opcode);
|
|
break;
|
|
case 0x38: /* LER Rx,Ry */
|
|
signal = math_emu_ler(opcode);
|
|
break;
|
|
case 0x60: /* STD R,D(X,B) */
|
|
get_user(*((__u16 *) (opcode+2)), location+1);
|
|
signal = math_emu_std(opcode, regs);
|
|
break;
|
|
case 0x68: /* LD R,D(X,B) */
|
|
get_user(*((__u16 *) (opcode+2)), location+1);
|
|
signal = math_emu_ld(opcode, regs);
|
|
break;
|
|
case 0x70: /* STE R,D(X,B) */
|
|
get_user(*((__u16 *) (opcode+2)), location+1);
|
|
signal = math_emu_ste(opcode, regs);
|
|
break;
|
|
case 0x78: /* LE R,D(X,B) */
|
|
get_user(*((__u16 *) (opcode+2)), location+1);
|
|
signal = math_emu_le(opcode, regs);
|
|
break;
|
|
default:
|
|
signal = SIGILL;
|
|
break;
|
|
}
|
|
} else
|
|
signal = SIGILL;
|
|
|
|
if (signal == SIGFPE)
|
|
do_fp_trap(regs, location,
|
|
current->thread.fp_regs.fpc, interruption_code);
|
|
else if (signal) {
|
|
siginfo_t info;
|
|
info.si_signo = signal;
|
|
info.si_errno = 0;
|
|
info.si_code = ILL_ILLOPN;
|
|
info.si_addr = location;
|
|
do_trap(interruption_code, signal,
|
|
"specification exception", regs, &info);
|
|
}
|
|
}
|
|
#else
|
|
DO_ERROR_INFO(SIGILL, "specification exception", specification_exception,
|
|
ILL_ILLOPN, get_check_address(regs));
|
|
#endif
|
|
|
|
static void data_exception(struct pt_regs * regs, long interruption_code)
|
|
{
|
|
__u16 __user *location;
|
|
int signal = 0;
|
|
|
|
location = get_check_address(regs);
|
|
|
|
/*
|
|
* We got all needed information from the lowcore and can
|
|
* now safely switch on interrupts.
|
|
*/
|
|
if (regs->psw.mask & PSW_MASK_PSTATE)
|
|
local_irq_enable();
|
|
|
|
if (MACHINE_HAS_IEEE)
|
|
asm volatile("stfpc %0" : "=m" (current->thread.fp_regs.fpc));
|
|
|
|
#ifdef CONFIG_MATHEMU
|
|
else if (regs->psw.mask & PSW_MASK_PSTATE) {
|
|
__u8 opcode[6];
|
|
get_user(*((__u16 *) opcode), location);
|
|
switch (opcode[0]) {
|
|
case 0x28: /* LDR Rx,Ry */
|
|
signal = math_emu_ldr(opcode);
|
|
break;
|
|
case 0x38: /* LER Rx,Ry */
|
|
signal = math_emu_ler(opcode);
|
|
break;
|
|
case 0x60: /* STD R,D(X,B) */
|
|
get_user(*((__u16 *) (opcode+2)), location+1);
|
|
signal = math_emu_std(opcode, regs);
|
|
break;
|
|
case 0x68: /* LD R,D(X,B) */
|
|
get_user(*((__u16 *) (opcode+2)), location+1);
|
|
signal = math_emu_ld(opcode, regs);
|
|
break;
|
|
case 0x70: /* STE R,D(X,B) */
|
|
get_user(*((__u16 *) (opcode+2)), location+1);
|
|
signal = math_emu_ste(opcode, regs);
|
|
break;
|
|
case 0x78: /* LE R,D(X,B) */
|
|
get_user(*((__u16 *) (opcode+2)), location+1);
|
|
signal = math_emu_le(opcode, regs);
|
|
break;
|
|
case 0xb3:
|
|
get_user(*((__u16 *) (opcode+2)), location+1);
|
|
signal = math_emu_b3(opcode, regs);
|
|
break;
|
|
case 0xed:
|
|
get_user(*((__u32 *) (opcode+2)),
|
|
(__u32 __user *)(location+1));
|
|
signal = math_emu_ed(opcode, regs);
|
|
break;
|
|
case 0xb2:
|
|
if (opcode[1] == 0x99) {
|
|
get_user(*((__u16 *) (opcode+2)), location+1);
|
|
signal = math_emu_srnm(opcode, regs);
|
|
} else if (opcode[1] == 0x9c) {
|
|
get_user(*((__u16 *) (opcode+2)), location+1);
|
|
signal = math_emu_stfpc(opcode, regs);
|
|
} else if (opcode[1] == 0x9d) {
|
|
get_user(*((__u16 *) (opcode+2)), location+1);
|
|
signal = math_emu_lfpc(opcode, regs);
|
|
} else
|
|
signal = SIGILL;
|
|
break;
|
|
default:
|
|
signal = SIGILL;
|
|
break;
|
|
}
|
|
}
|
|
#endif
|
|
if (current->thread.fp_regs.fpc & FPC_DXC_MASK)
|
|
signal = SIGFPE;
|
|
else
|
|
signal = SIGILL;
|
|
if (signal == SIGFPE)
|
|
do_fp_trap(regs, location,
|
|
current->thread.fp_regs.fpc, interruption_code);
|
|
else if (signal) {
|
|
siginfo_t info;
|
|
info.si_signo = signal;
|
|
info.si_errno = 0;
|
|
info.si_code = ILL_ILLOPN;
|
|
info.si_addr = location;
|
|
do_trap(interruption_code, signal,
|
|
"data exception", regs, &info);
|
|
}
|
|
}
|
|
|
|
static void space_switch_exception(struct pt_regs * regs, long int_code)
|
|
{
|
|
siginfo_t info;
|
|
|
|
/* Set user psw back to home space mode. */
|
|
if (regs->psw.mask & PSW_MASK_PSTATE)
|
|
regs->psw.mask |= PSW_ASC_HOME;
|
|
/* Send SIGILL. */
|
|
info.si_signo = SIGILL;
|
|
info.si_errno = 0;
|
|
info.si_code = ILL_PRVOPC;
|
|
info.si_addr = get_check_address(regs);
|
|
do_trap(int_code, SIGILL, "space switch event", regs, &info);
|
|
}
|
|
|
|
asmlinkage void kernel_stack_overflow(struct pt_regs * regs)
|
|
{
|
|
bust_spinlocks(1);
|
|
printk("Kernel stack overflow.\n");
|
|
show_regs(regs);
|
|
bust_spinlocks(0);
|
|
panic("Corrupt kernel stack, can't continue.");
|
|
}
|
|
|
|
/* init is done in lowcore.S and head.S */
|
|
|
|
void __init trap_init(void)
|
|
{
|
|
int i;
|
|
|
|
for (i = 0; i < 128; i++)
|
|
pgm_check_table[i] = &default_trap_handler;
|
|
pgm_check_table[1] = &illegal_op;
|
|
pgm_check_table[2] = &privileged_op;
|
|
pgm_check_table[3] = &execute_exception;
|
|
pgm_check_table[4] = &do_protection_exception;
|
|
pgm_check_table[5] = &addressing_exception;
|
|
pgm_check_table[6] = &specification_exception;
|
|
pgm_check_table[7] = &data_exception;
|
|
pgm_check_table[8] = &overflow_exception;
|
|
pgm_check_table[9] = ÷_exception;
|
|
pgm_check_table[0x0A] = &overflow_exception;
|
|
pgm_check_table[0x0B] = ÷_exception;
|
|
pgm_check_table[0x0C] = &hfp_overflow_exception;
|
|
pgm_check_table[0x0D] = &hfp_underflow_exception;
|
|
pgm_check_table[0x0E] = &hfp_significance_exception;
|
|
pgm_check_table[0x0F] = &hfp_divide_exception;
|
|
pgm_check_table[0x10] = &do_dat_exception;
|
|
pgm_check_table[0x11] = &do_dat_exception;
|
|
pgm_check_table[0x12] = &translation_exception;
|
|
pgm_check_table[0x13] = &special_op_exception;
|
|
#ifdef CONFIG_64BIT
|
|
pgm_check_table[0x38] = &do_asce_exception;
|
|
pgm_check_table[0x39] = &do_dat_exception;
|
|
pgm_check_table[0x3A] = &do_dat_exception;
|
|
pgm_check_table[0x3B] = &do_dat_exception;
|
|
#endif /* CONFIG_64BIT */
|
|
pgm_check_table[0x15] = &operand_exception;
|
|
pgm_check_table[0x1C] = &space_switch_exception;
|
|
pgm_check_table[0x1D] = &hfp_sqrt_exception;
|
|
pfault_irq_init();
|
|
}
|