mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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7fca5dc8aa
Gcc 4.5 is now generating out of line register save and restore in the function prefix and postfix when we use -Os. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
359 lines
7.9 KiB
ArmAsm
359 lines
7.9 KiB
ArmAsm
/*
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* Special support for eabi and SVR4
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*
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* Copyright (C) 1995, 1996, 1998, 2000, 2001 Free Software Foundation, Inc.
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* Copyright 2008 Freescale Semiconductor, Inc.
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* Written By Michael Meissner
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*
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* Based on gcc/config/rs6000/crtsavres.asm from gcc
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* 64 bit additions from reading the PPC elf64abi document.
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*
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* This file is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2, or (at your option) any
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* later version.
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*
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* In addition to the permissions in the GNU General Public License, the
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* Free Software Foundation gives you unlimited permission to link the
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* compiled version of this file with other programs, and to distribute
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* those programs without any restriction coming from the use of this
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* file. (The General Public License restrictions do apply in other
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* respects; for example, they cover modification of the file, and
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* distribution when not linked into another program.)
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*
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* This file is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; see the file COPYING. If not, write to
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* the Free Software Foundation, 51 Franklin Street, Fifth Floor,
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* Boston, MA 02110-1301, USA.
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*
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* As a special exception, if you link this library with files
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* compiled with GCC to produce an executable, this does not cause
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* the resulting executable to be covered by the GNU General Public License.
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* This exception does not however invalidate any other reasons why
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* the executable file might be covered by the GNU General Public License.
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*/
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#include <asm/ppc_asm.h>
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.file "crtsavres.S"
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.section ".text"
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#ifdef CONFIG_CC_OPTIMIZE_FOR_SIZE
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#ifndef CONFIG_PPC64
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/* Routines for saving integer registers, called by the compiler. */
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/* Called with r11 pointing to the stack header word of the caller of the */
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/* function, just beyond the end of the integer save area. */
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_GLOBAL(_savegpr_14)
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_GLOBAL(_save32gpr_14)
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stw 14,-72(11) /* save gp registers */
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_GLOBAL(_savegpr_15)
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_GLOBAL(_save32gpr_15)
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stw 15,-68(11)
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_GLOBAL(_savegpr_16)
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_GLOBAL(_save32gpr_16)
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stw 16,-64(11)
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_GLOBAL(_savegpr_17)
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_GLOBAL(_save32gpr_17)
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stw 17,-60(11)
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_GLOBAL(_savegpr_18)
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_GLOBAL(_save32gpr_18)
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stw 18,-56(11)
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_GLOBAL(_savegpr_19)
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_GLOBAL(_save32gpr_19)
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stw 19,-52(11)
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_GLOBAL(_savegpr_20)
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_GLOBAL(_save32gpr_20)
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stw 20,-48(11)
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_GLOBAL(_savegpr_21)
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_GLOBAL(_save32gpr_21)
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stw 21,-44(11)
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_GLOBAL(_savegpr_22)
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_GLOBAL(_save32gpr_22)
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stw 22,-40(11)
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_GLOBAL(_savegpr_23)
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_GLOBAL(_save32gpr_23)
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stw 23,-36(11)
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_GLOBAL(_savegpr_24)
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_GLOBAL(_save32gpr_24)
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stw 24,-32(11)
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_GLOBAL(_savegpr_25)
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_GLOBAL(_save32gpr_25)
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stw 25,-28(11)
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_GLOBAL(_savegpr_26)
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_GLOBAL(_save32gpr_26)
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stw 26,-24(11)
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_GLOBAL(_savegpr_27)
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_GLOBAL(_save32gpr_27)
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stw 27,-20(11)
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_GLOBAL(_savegpr_28)
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_GLOBAL(_save32gpr_28)
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stw 28,-16(11)
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_GLOBAL(_savegpr_29)
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_GLOBAL(_save32gpr_29)
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stw 29,-12(11)
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_GLOBAL(_savegpr_30)
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_GLOBAL(_save32gpr_30)
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stw 30,-8(11)
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_GLOBAL(_savegpr_31)
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_GLOBAL(_save32gpr_31)
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stw 31,-4(11)
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blr
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/* Routines for restoring integer registers, called by the compiler. */
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/* Called with r11 pointing to the stack header word of the caller of the */
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/* function, just beyond the end of the integer restore area. */
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_GLOBAL(_restgpr_14)
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_GLOBAL(_rest32gpr_14)
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lwz 14,-72(11) /* restore gp registers */
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_GLOBAL(_restgpr_15)
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_GLOBAL(_rest32gpr_15)
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lwz 15,-68(11)
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_GLOBAL(_restgpr_16)
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_GLOBAL(_rest32gpr_16)
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lwz 16,-64(11)
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_GLOBAL(_restgpr_17)
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_GLOBAL(_rest32gpr_17)
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lwz 17,-60(11)
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_GLOBAL(_restgpr_18)
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_GLOBAL(_rest32gpr_18)
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lwz 18,-56(11)
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_GLOBAL(_restgpr_19)
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_GLOBAL(_rest32gpr_19)
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lwz 19,-52(11)
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_GLOBAL(_restgpr_20)
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_GLOBAL(_rest32gpr_20)
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lwz 20,-48(11)
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_GLOBAL(_restgpr_21)
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_GLOBAL(_rest32gpr_21)
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lwz 21,-44(11)
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_GLOBAL(_restgpr_22)
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_GLOBAL(_rest32gpr_22)
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lwz 22,-40(11)
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_GLOBAL(_restgpr_23)
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_GLOBAL(_rest32gpr_23)
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lwz 23,-36(11)
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_GLOBAL(_restgpr_24)
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_GLOBAL(_rest32gpr_24)
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lwz 24,-32(11)
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_GLOBAL(_restgpr_25)
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_GLOBAL(_rest32gpr_25)
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lwz 25,-28(11)
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_GLOBAL(_restgpr_26)
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_GLOBAL(_rest32gpr_26)
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lwz 26,-24(11)
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_GLOBAL(_restgpr_27)
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_GLOBAL(_rest32gpr_27)
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lwz 27,-20(11)
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_GLOBAL(_restgpr_28)
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_GLOBAL(_rest32gpr_28)
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lwz 28,-16(11)
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_GLOBAL(_restgpr_29)
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_GLOBAL(_rest32gpr_29)
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lwz 29,-12(11)
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_GLOBAL(_restgpr_30)
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_GLOBAL(_rest32gpr_30)
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lwz 30,-8(11)
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_GLOBAL(_restgpr_31)
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_GLOBAL(_rest32gpr_31)
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lwz 31,-4(11)
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blr
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/* Routines for restoring integer registers, called by the compiler. */
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/* Called with r11 pointing to the stack header word of the caller of the */
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/* function, just beyond the end of the integer restore area. */
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_GLOBAL(_restgpr_14_x)
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_GLOBAL(_rest32gpr_14_x)
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lwz 14,-72(11) /* restore gp registers */
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_GLOBAL(_restgpr_15_x)
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_GLOBAL(_rest32gpr_15_x)
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lwz 15,-68(11)
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_GLOBAL(_restgpr_16_x)
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_GLOBAL(_rest32gpr_16_x)
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lwz 16,-64(11)
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_GLOBAL(_restgpr_17_x)
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_GLOBAL(_rest32gpr_17_x)
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lwz 17,-60(11)
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_GLOBAL(_restgpr_18_x)
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_GLOBAL(_rest32gpr_18_x)
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lwz 18,-56(11)
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_GLOBAL(_restgpr_19_x)
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_GLOBAL(_rest32gpr_19_x)
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lwz 19,-52(11)
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_GLOBAL(_restgpr_20_x)
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_GLOBAL(_rest32gpr_20_x)
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lwz 20,-48(11)
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_GLOBAL(_restgpr_21_x)
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_GLOBAL(_rest32gpr_21_x)
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lwz 21,-44(11)
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_GLOBAL(_restgpr_22_x)
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_GLOBAL(_rest32gpr_22_x)
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lwz 22,-40(11)
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_GLOBAL(_restgpr_23_x)
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_GLOBAL(_rest32gpr_23_x)
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lwz 23,-36(11)
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_GLOBAL(_restgpr_24_x)
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_GLOBAL(_rest32gpr_24_x)
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lwz 24,-32(11)
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_GLOBAL(_restgpr_25_x)
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_GLOBAL(_rest32gpr_25_x)
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lwz 25,-28(11)
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_GLOBAL(_restgpr_26_x)
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_GLOBAL(_rest32gpr_26_x)
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lwz 26,-24(11)
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_GLOBAL(_restgpr_27_x)
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_GLOBAL(_rest32gpr_27_x)
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lwz 27,-20(11)
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_GLOBAL(_restgpr_28_x)
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_GLOBAL(_rest32gpr_28_x)
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lwz 28,-16(11)
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_GLOBAL(_restgpr_29_x)
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_GLOBAL(_rest32gpr_29_x)
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lwz 29,-12(11)
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_GLOBAL(_restgpr_30_x)
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_GLOBAL(_rest32gpr_30_x)
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lwz 30,-8(11)
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_GLOBAL(_restgpr_31_x)
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_GLOBAL(_rest32gpr_31_x)
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lwz 0,4(11)
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lwz 31,-4(11)
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mtlr 0
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mr 1,11
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blr
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#else /* CONFIG_PPC64 */
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.globl _savegpr0_14
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_savegpr0_14:
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std r14,-144(r1)
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.globl _savegpr0_15
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_savegpr0_15:
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std r15,-136(r1)
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.globl _savegpr0_16
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_savegpr0_16:
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std r16,-128(r1)
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.globl _savegpr0_17
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_savegpr0_17:
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std r17,-120(r1)
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.globl _savegpr0_18
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_savegpr0_18:
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std r18,-112(r1)
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.globl _savegpr0_19
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_savegpr0_19:
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std r19,-104(r1)
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.globl _savegpr0_20
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_savegpr0_20:
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std r20,-96(r1)
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.globl _savegpr0_21
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_savegpr0_21:
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std r21,-88(r1)
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.globl _savegpr0_22
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_savegpr0_22:
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std r22,-80(r1)
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.globl _savegpr0_23
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_savegpr0_23:
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std r23,-72(r1)
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.globl _savegpr0_24
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_savegpr0_24:
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std r24,-64(r1)
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.globl _savegpr0_25
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_savegpr0_25:
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std r25,-56(r1)
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.globl _savegpr0_26
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_savegpr0_26:
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std r26,-48(r1)
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.globl _savegpr0_27
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_savegpr0_27:
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std r27,-40(r1)
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.globl _savegpr0_28
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_savegpr0_28:
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std r28,-32(r1)
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.globl _savegpr0_29
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_savegpr0_29:
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std r29,-24(r1)
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.globl _savegpr0_30
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_savegpr0_30:
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std r30,-16(r1)
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.globl _savegpr0_31
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_savegpr0_31:
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std r31,-8(r1)
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std r0,16(r1)
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blr
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.globl _restgpr0_14
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_restgpr0_14:
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ld r14,-144(r1)
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.globl _restgpr0_15
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_restgpr0_15:
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ld r15,-136(r1)
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.globl _restgpr0_16
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_restgpr0_16:
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ld r16,-128(r1)
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.globl _restgpr0_17
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_restgpr0_17:
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ld r17,-120(r1)
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.globl _restgpr0_18
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_restgpr0_18:
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ld r18,-112(r1)
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.globl _restgpr0_19
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_restgpr0_19:
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ld r19,-104(r1)
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.globl _restgpr0_20
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_restgpr0_20:
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ld r20,-96(r1)
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.globl _restgpr0_21
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_restgpr0_21:
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ld r21,-88(r1)
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.globl _restgpr0_22
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_restgpr0_22:
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ld r22,-80(r1)
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.globl _restgpr0_23
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_restgpr0_23:
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ld r23,-72(r1)
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.globl _restgpr0_24
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_restgpr0_24:
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ld r24,-64(r1)
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.globl _restgpr0_25
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_restgpr0_25:
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ld r25,-56(r1)
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.globl _restgpr0_26
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_restgpr0_26:
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ld r26,-48(r1)
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.globl _restgpr0_27
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_restgpr0_27:
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ld r27,-40(r1)
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.globl _restgpr0_28
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_restgpr0_28:
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ld r28,-32(r1)
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.globl _restgpr0_29
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_restgpr0_29:
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ld r0,16(r1)
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ld r29,-24(r1)
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mtlr r0
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ld r30,-16(r1)
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ld r31,-8(r1)
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blr
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.globl _restgpr0_30
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_restgpr0_30:
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ld r30,-16(r1)
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.globl _restgpr0_31
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_restgpr0_31:
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ld r0,16(r1)
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ld r31,-8(r1)
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mtlr r0
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blr
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#endif /* CONFIG_PPC64 */
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#endif
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