Nicholas Kazlauskas 02316e963a drm/amd/display: Force uclk to max for every state ... Workaround for now to avoid underflow. The uclk switch time should really be bumped up to 404, but doing so would expose p-state hang issues for higher bandwidth display configurations. Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2019-07-18 14:11:47 -05:00
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dcn20_dccg.c
dcn20_dccg.h
dcn20_dpp_cm.c
dcn20_dpp.c
dcn20_dpp.h
dcn20_dsc.c	drm/amd/display: fix a couple of spelling mistakes	2019-06-27 11:22:57 -05:00
dcn20_dsc.h
dcn20_dwb_scl.c
dcn20_dwb.c
dcn20_dwb.h
dcn20_hubbub.c
dcn20_hubbub.h
dcn20_hubp.c
dcn20_hubp.h
dcn20_hwseq.c	drm/amd/display: dcn20: include linux/delay.h	2019-07-08 13:56:27 -05:00
dcn20_hwseq.h
dcn20_link_encoder.c
dcn20_link_encoder.h
dcn20_mmhubbub.c
dcn20_mmhubbub.h
dcn20_mpc.c
dcn20_mpc.h
dcn20_opp.c
dcn20_opp.h
dcn20_optc.c
dcn20_optc.h
dcn20_resource.c	drm/amd/display: Force uclk to max for every state	2019-07-18 14:11:47 -05:00
dcn20_resource.h
dcn20_stream_encoder.c
dcn20_stream_encoder.h
dcn20_vmid.c
dcn20_vmid.h
Makefile	drm/amd/display: Support clang option for stack alignment	2019-07-16 13:02:39 -05:00