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92e5d4e939
Aligned with what we have done for the others nodes. It will also allow to easily modify the cpu configuration at board (or sub-SoC) level. Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
28 lines
550 B
Plaintext
28 lines
550 B
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Device Tree Include file for Marvell Armada 372x family of SoCs
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* (also named 88F3720)
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*
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* Copyright (C) 2016 Marvell
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*
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* Gregory CLEMENT <gregory.clement@free-electrons.com>
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*
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*/
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#include "armada-37xx.dtsi"
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/ {
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model = "Marvell Armada 3720 SoC";
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compatible = "marvell,armada3720", "marvell,armada3710";
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cpus {
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cpu1: cpu@1 {
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device_type = "cpu";
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compatible = "arm,cortex-a53","arm,armv8";
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reg = <0x1>;
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clocks = <&nb_periph_clk 16>;
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enable-method = "psci";
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};
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};
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};
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