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LS1088A contains eight ARM v8 CortexA53 processor cores with 32 KB L1-D cache and 32 KB L1-I cache Features summary Eight 32-bit / 64-bit ARM v8 Cortex-A53 CPUs - Arranged as two clusters of four cores sharing a 1 MB L2 cache - Speed Up to 1.5 GHz - Support for cluster power-gating. Cache coherent interconnect (CCI-400) - Hardware-managed data coherency - Up to 700 MHz One 64-bit DDR4 SDRAM memory controller with ECC Data path acceleration architecture 2.0 (DPAA2) Three PCIe 3.0 controllers One serial ATA (SATA 3.0) controller Three high-speed USB 3.0 controllers with integrated PHY Following levels of DTSI/DTS files have been created for the LS1088A SoC family: - fsl-ls1088a.dtsi: DTS-Include file for NXP LS1088A SoC. - fsl-ls1088a-qds.dts: DTS file for NXP LS1088A QDS board. - fsl-ls1088a-rdb.dts: DTS file for NXP LS1088A RDB board Signed-off-by: Harninder Rai <harninder.rai@nxp.com> Signed-off-by: Ashish Kumar <ashish.kumar@nxp.com> Signed-off-by: Raghav Dogra <raghav.dogra@nxp.com>` Signed-off-by: Shawn Guo <shawnguo@kernel.org>
108 lines
2.8 KiB
Plaintext
108 lines
2.8 KiB
Plaintext
/*
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* Device Tree file for NXP LS1088A RDB Board.
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*
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* Copyright 2017 NXP
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*
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* Harninder Rai <harninder.rai@nxp.com>
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*
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* This file is dual-licensed: you can use it either under the terms
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* of the GPLv2 or the X11 license, at your option. Note that this dual
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* licensing only applies to this file, and not this project as a
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* whole.
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*
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* a) This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Or, alternatively,
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*
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* b) Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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/dts-v1/;
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#include "fsl-ls1088a.dtsi"
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/ {
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model = "L1088A RDB Board";
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compatible = "fsl,ls1088a-rdb", "fsl,ls1088a";
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};
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&i2c0 {
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status = "okay";
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i2c-switch@77 {
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compatible = "nxp,pca9547";
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reg = <0x77>;
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#address-cells = <1>;
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#size-cells = <0>;
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i2c@2 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x2>;
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ina220@40 {
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compatible = "ti,ina220";
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reg = <0x40>;
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shunt-resistor = <1000>;
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};
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};
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i2c@3 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x3>;
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temp-sensor@4c {
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compatible = "adi,adt7461a";
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reg = <0x4c>;
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};
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rtc@51 {
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compatible = "nxp,pcf2129";
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reg = <0x51>;
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/* IRQ10_B */
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interrupts = <0 150 IRQ_TYPE_LEVEL_HIGH>;
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};
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};
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};
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};
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&duart0 {
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status = "okay";
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};
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&duart1 {
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status = "okay";
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};
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&sata {
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status = "okay";
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};
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